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embeddedsw.git - repo for standalone software The standalone software is divided into following directories: - lib contains bsp, software apps and software services - license.txt contains information about the various licenses and copyrights - doc/ChangeLog Contains change log information for releases - XilinxProcessorIPLib/drivers contains all drivers - ThirdParty software from third party like light weight IP stack - mcap/linux software for using MCAP interface on Ultra Scale boards to program 2nd level bitstream Every driver, sw_apps and sw_services has one or more of these sub-directories: 1. data - contains tcl, mdd, testapp tcl or header files used in Vitis 2. doc - documentation of source code in form of pdf or html 3. examples - illustrating different use cases of driver 4. src - driver interface code implementing functionality of IP <repo> |-LICENSES | |-ThirdParty | |- bsp | |- freertos10_xilinx | |- data |- examples | |- src | |- License | |- Source | |- sw_services | |- libmetal | |- lwip141 | |- lwip202 | |- openamp | |-XilinxProcessorIPLib | |- drivers | |- avbuf | |- ... | |- ... | |- zdma | |-doc |-lib | |- bsp | |- standalone | |- data | |- doc | |- src | |- arm | |- common | |- ARMv8 | |- cortexa9 | |- cortexr5 | |- common | |- microblaze | |- profile | |- sw_apps | |- ddr_self_refresh | |- .... | |- .... | |- .... | |- .... | |- zynqmp_fsbl [described below] | |- zynqmp_pmufw [described below] | |- versal_plm [described below] | |- versal_psmfw [described below] | |- sw_services | |- xilffs | |- xilflash | |- xilfpga | |- xilisf | |- xilmfs | |- xilpm | |- xilrsa | |- xilsecure | |- xilskey | | Note - All these are libraries and utilize drivers | |-mcap | |-linux Building FSBL from git: ============================== FSBL(zynq_fsbl/zynqmp_fsbl) has 3 directories. 1. data - It contains files for Vitis 2. src - It contains the FSBL source files 3. misc - It contains miscellaneous files required to compile FSBL. For zynq (zynq_fsbl), builds for zc702, zc706, zed are supported. It also contains the ps7_init_gpl.[c/h] with gpl header in respective board directories. For zynqmp (zynqmp_fsbl), builds for zcu102,zcu102-es2 board are supported. How to compile FSBL: Zynq: Please refer to the steps in Readme.txt which is at lib/sw_apps/zynq_fsbl/misc/ directory ZynqMP Please refer to the steps in Readme.txt which is at lib/sw_apps/zynqmp_fsbl/misc/ directory Building PMUFW from git: ============================== Please refer to the steps in Readme.txt which is at lib/sw_apps/zynqmp_pmufw/misc/ directory Building Versal PLM from git: ============================== Please refer to the steps in Readme.txt which is at lib/sw_apps/versal_plm/misc/ directory Building Versal PSMFW from git: ============================== Please refer to the steps in Readme.txt which is at lib/sw_apps/versal_psmfw/misc/ directory
PYNQ
Python Productivity for ZYNQVitis-AI
Vitis AI is Xilinxβs development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.linux-xlnx
The official Linux kernel from Xilinxbrevitas
Brevitas: neural network quantization in PyTorchVitis-Tutorials
Vitis In-Depth TutorialsVitis_Libraries
Vitis Librariesfinn
Dataflow compiler for QNN inference on FPGAsBNN-PYNQ
Quantized Neural Networks (QNNs) on PYNQXRT
Run Time for AIE and FPGA based platformsu-boot-xlnx
The official Xilinx u-boot repositoryVitis_Accel_Examples
Vitis_Accel_ExamplesVitis-HLS-Introductory-Examples
dma_ip_drivers
Xilinx QDMA IP DriversHLS
Vitis HLS LLVM source code and examplesVitis-AI-Tutorials
PYNQ_Workshop
SDAccel_Examples
SDAccel Examplesml-suite
Getting Started with Xilinx ML SuiteCHaiDNN
HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCsxfopencv
XilinxTclStore
Xilinx Tcl Storemlir-aie
An MLIR-based toolchain for AMD AI Engine-enabled devices.XilinxBoardStore
RapidWright
Build Customized FPGA Implementations for VivadoQNN-MO-PYNQ
libsystemctlm-soc
SystemC/TLM-2.0 Co-simulation frameworkqemu
Xilinx's fork of Quick EMUlator (QEMU) with improved support and modelling for the Xilinx platforms.DPU-PYNQ
DPU on PYNQdevice-tree-xlnx
Linux device tree generator for the Xilinx SDK (Vivado > 2014.1)finn-examples
Dataflow QNN inference accelerator examples on FPGAsPYNQ-ComputerVision
Computer Vision Overlays on PynqXilinxVirtualCable
Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and provides a means to access and debug your FPGA or SoC design without using a physical cable.finn-hlslib
Vitis HLS Library for FINNgraffitist
Graph Transforms to Quantize and Retrain Deep Neural Nets in TensorFlowopen-nic
AMD OpenNIC Project OverviewSDSoC-Tutorials
SDSoCβ’ (Software-Defined System-On-Chip) Environment Tutorialsxilinx-tiny-cnn
FPGA_as_a_Service
xup_vitis_network_example
VNx: Vitis Network Examplesmeta-xilinx
Collection of Yocto Project layers to enable AMD Xilinx productssystemctlm-cosim-demo
QEMU libsystemctlm-soc co-simulation demos.Vitis-In-Depth-Tutorial
Vitis_Embedded_Platform_Source
llvm-aie
Fork of LLVM to support AMD AIEngine processorsSDAccel-Tutorials
SDAccel Development Environment Tutorialsnanotube
Embedded-Design-Tutorials
RecoNIC
RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.RFNoC-HLS-NeuralNet
PYNQ-DL
Xilinx Deep Learning IPKria-PYNQ
PYNQ support and examples for Kria SOMsPYNQ-HelloWorld
This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.LSTM-PYNQ
kria-vitis-platforms
Kria Vitis platforms and overlaysmeta-petalinux
meta-petalinux distro layer supporting Xilinx ToolsVivado-Design-Tutorials
SDSoC_Examples
ACCL
Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo acceleratorslogicnets
IIoT-EDDP
The repository contains the design database and documentation for Electric Drives Demonstration Platformmlir-air
AI-Model-Zoo
Applications
open-nic-shell
AMD OpenNIC Shell includes the HDL source filesXilinxUnisimLibrary
Xilinx Unisim Library in VerilogPYNQ_Composable_Pipeline
PYNQ Composabe Overlaysmerlin-compiler
PYNQ_RFSOC_Workshop
Open-sourcing the PYNQ & RFSoC workshop materialsgemx
Matrix Operation Library for FPGA https://xilinx.github.io/gemx/xup_high_level_synthesis_design_flow
AMD University Program HLS tutorialmeta-xilinx-tools
Yocto Project layer enables AMD Xilinx tools related metadata for MicroBlaze, Zynq, ZynqMP and Versal devices.RFSoC-PYNQ
Python productivity for RFSoC platformsAlveo-PYNQ
Introductory examples for using PYNQ with AlveoResNet50-PYNQ
Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQxup_compute_acceleration
Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardwareVitis_Model_Composer
Vitis Model Composer Examples and TutorialsKRS
The Kria Robotics Stack (KRS) is a ROS 2 superset for industry, an integrated set of robot libraries and utilities to accelerate the development, maintenance and commercialization of industrial-grade robotic solutions while using adaptive computing.Vitis-AWS-F1-Developer-Labs
PYNQ_Bootcamp
PYNQ Bootcamp 2019-2022 teaching materials.PYNQ-Networking
Networking Overlay on PYNQHLS_packet_processing
blockchainacceleration
Get_Moving_With_Alveo
For publishing the source for UG1352 "Get Moving with Alveo"DSRL
pcie-model
PCI Express controller modelXilinxCEDStore
This store contains Configurable Example Designs.inference-server
HLS_arbitrary_Precision_Types
Xilinx_Kria_KV260_Workshop
vcu-ctrl-sw
VVAS
Vitis Video Analytics SDKchipscopy
ChipScoPy (ChipScope Python API) is an open source Python API to the various ChipScope services provided by the TCF-based (Target Communication Framework) ChipScope Server (cs_server).pyxir
xup_aie_training
Hands-on experience programming AI Engines using Vitis Unified Software PlatformDSP-PYNQ
A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+hdmi-modules
Xilinx Soft-IP HDMI Rx/Tx core Linux driverspytorch-ocr
open-nic-driver
AMD OpenNIC driver includes the Linux kernel driverbootgen
bootgen source codeqemu-devicetrees
Device trees used by QEMU to describe the hardwareLove Open Source and this site? Check out how you can help us