Anderson Ignacio (@aignacio)
  • Stars
    star
    363
  • Global Rank 73,607 (Top 3 %)
  • Followers 107
  • Following 36
  • Registered over 10 years ago
  • Most used languages
    C
    34.6 %
    SystemVerilog
    19.2 %
    Python
    11.5 %
    Makefile
    11.5 %
    Verilog
    11.5 %
    C++
    3.8 %
    HTML
    3.8 %
    MATLAB
    3.8 %
  • Location ๐Ÿ‡ฎ๐Ÿ‡ช Ireland
  • Country Total Rank 207
  • Country Ranking
    SystemVerilog
    1
    Verilog
    2
    Makefile
    12
    C
    19
    MATLAB
    32
    Python
    379
    C++
    408
    HTML
    582

Top repositories

1

ravenoc

RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications
SystemVerilog
116
star
2

mpsoc_example

Verilog
52
star
3

nox

RISC-V Nox core
C
45
star
4

riscv_verilator_model

RISCV model for Verilator/FPGA targets
C
40
star
5

axi_dma

General Purpose AXI Direct Memory Access
SystemVerilog
28
star
6

ahb_lite_bus

AHB Bus lite v3.0
SystemVerilog
11
star
7

iir_filter

IIR Lowpass Filter
Verilog
9
star
8

mqtt-sn-contiki_example

Example of MQTT-SN with Contiki-OS for blog.aignacio.com
Makefile
6
star
9

cocotbext-ahb

Cocotb AHB Extension - AHB VIP
Python
5
star
10

cdc_components

Collection of different designs for clock domain crossing
Python
4
star
11

nox_freertos

C
4
star
12

mser

MATLAB Implementation of MSER LT algorithm
MATLAB
3
star
13

deca_board_demo

Verilog
2
star
14

esp_homestark

Fork from [ https://github.com/tuanpmt/esp_mqtt + https://github.com/tuanpmt/esp_mqtt ]
C
2
star
15

hwacha_vvadd_benchmark

Benchmark for Hwacha vector accelerator of vvadd computation tweaked
C
2
star
16

cyclonev_example

Files for "Getting Through Cyclone V" post from blog.aignacio.com
C
2
star
17

mser_baremetal

Makefile
1
star
18

exampleSTMF32Bluepill

Example of STMF32 App for blog.aignacio.com
C
1
star
19

homestark_mqtt_6lowpan_port

Porte do MQTT-SN para o Contiki
HTML
1
star
20

zigbee_tests

Smart sensor node Network using Z-stack from texas instruments and CC2530
C
1
star
21

soc_components

SystemVerilog
1
star
22

segmentation_opencv_linux

C++ Application to segment an input image
C++
1
star
23

tiva_arm_template

Tools for a complete environment to develop on TIVA launchpad arm {TM4C123GH6PM}
C
1
star
24

udp-contiki-ipv6

Demo code for post on blog.aignacio.com about using UDP IPv6 server with Cooja and Contiki
Makefile
1
star
25

async_gp_fifo

Python
1
star
26

ethernet_axi

AXI wrapper around Ethernet module
SystemVerilog
1
star