• Stars
    star
    2
  • Language
    C
  • Created about 5 years ago
  • Updated about 5 years ago

Reviews

There are no reviews yet. Be the first to send feedback to the community and the maintainers!

Repository Details

Benchmark for Hwacha vector accelerator of vvadd computation tweaked

More Repositories

1

ravenoc

RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications
SystemVerilog
127
star
2

mpsoc_example

Verilog
53
star
3

nox

RISC-V Nox core
C
45
star
4

riscv_verilator_model

RISCV model for Verilator/FPGA targets
C
40
star
5

axi_dma

General Purpose AXI Direct Memory Access
SystemVerilog
28
star
6

ahb_lite_bus

AHB Bus lite v3.0
SystemVerilog
13
star
7

iir_filter

IIR Lowpass Filter
Verilog
11
star
8

cocotbext-ahb

Cocotb AHB Extension - AHB VIP
Python
7
star
9

mqtt-sn-contiki_example

Example of MQTT-SN with Contiki-OS for blog.aignacio.com
Makefile
6
star
10

cdc_components

Collection of different designs for clock domain crossing
Python
4
star
11

mser

MATLAB Implementation of MSER LT algorithm
MATLAB
4
star
12

nox_freertos

C
4
star
13

soc_components

SystemVerilog
3
star
14

deca_board_demo

Verilog
2
star
15

esp_homestark

Fork from [ https://github.com/tuanpmt/esp_mqtt + https://github.com/tuanpmt/esp_mqtt ]
C
2
star
16

cyclonev_example

Files for "Getting Through Cyclone V" post from blog.aignacio.com
C
2
star
17

mser_baremetal

Makefile
1
star
18

exampleSTMF32Bluepill

Example of STMF32 App for blog.aignacio.com
C
1
star
19

homestark_mqtt_6lowpan_port

Porte do MQTT-SN para o Contiki
HTML
1
star
20

zigbee_tests

Smart sensor node Network using Z-stack from texas instruments and CC2530
C
1
star
21

segmentation_opencv_linux

C++ Application to segment an input image
C++
1
star
22

tiva_arm_template

Tools for a complete environment to develop on TIVA launchpad arm {TM4C123GH6PM}
C
1
star
23

udp-contiki-ipv6

Demo code for post on blog.aignacio.com about using UDP IPv6 server with Cooja and Contiki
Makefile
1
star
24

async_gp_fifo

Python
1
star
25

ethernet_axi

AXI wrapper around Ethernet module
SystemVerilog
1
star
26

bus_arch_sv_pkg

AMBA SystemVerilog structs
SystemVerilog
1
star