Processor-Simulator-in-VHDL

For my 4th semester Computer Architecture class, I was assigned to program a processor simulator in VHDL language. This was a big challenge due to the fact that not only was I trying to simulate how a processor works, but I had never even heard of the VHDL language. At the end, I think I managed pretty well. Here I share my project.

Operative-System-Simulator

I programmed the back-end and designed the front-end of an Operative System Simulator with the NI Labview software. This was a project asigned to me for my 4th semester Operative Systems course.