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litex
Build your hardware, easily!litepcie
Small footprint and configurable PCIe corelitedram
Small footprint and configurable DRAM coreliteeth
Small footprint and configurable Ethernet coreusb3_pipe
USB3 PIPE interface for Xilinx 7-Serieslitescope
Small footprint and configurable embedded FPGA logic analyzerpcie_screamer
PCIe Screamer - TLPs experiments...litesata
Small footprint and configurable SATA corelitesdcard
Small footprint and configurable SDCard corecolorlite
Take control of your Colorlight FPGA board with LiteX/LiteEth :)daisho
Test of the USB3 IP Core from Daisho on a Xilinx devicelitex_m2sdr
LiteX based M2 SDR FPGA board.litex-acorn-baseboard
LiteX development baseboards arround the SQRL Acorn.liteiclink
Small footprint and configurable Inter-Chip communication corespcie_analyzer
PCIe analyzer experimentslitejesd204b
Small footprint and configurable JESD204B corelitex_vexriscv_smp_test
VexRiscv-SMP integration test with LiteX.xtrx_julia
XTRX LiteX/LitePCIe based design for Julia Computinglitex_rp2040_pmod_test
Test of a RP2040 PMOD attached to a LiteX SoC.thunderscope
LiteX based FPGA gateware for Thunderscope.litex_verilog_axi_test
Integration test of Verilog AXI modules (https://github.com/alexforencich/verilog-axi) with LiteX.litesata_axiom
fk33_hbm2_test
HBM2 integration test on FK33 with LiteXlitex_hw_ci
LiteX Hardware CI tests.litex_vexriscv_smp_usb_host_test
Integration test with SpinalHDL's OHCI USB Host core and LiteX/VexRiscv-SMP.litex_neorv32_test
NEORV32 integration test with LiteXlitex_playground
Small LiteX related projects that have been or could be useful...litex_soc_gen_test
Test of LiteX standalone SoC generator.tapcfg
tapcfglitex_naxriscv_test
NaxRiscv integration test with LiteXlitex_limesdr_mini_v2_test
LiteX alternative SoC/Gateware for the LimeSDR Mini 2.0litex_openwrt_test
Test of OpenWRT on LiteX SoCs.betrusted_soc_power_tests
vhdl2doc
litex_agilex5_test
Initial Test/Support of LiteX on Intel Agilex5 FPGAs.litex_mister_test
Simplification test of MiSTer with LiteX to try to help/contribute to MiSTeX project.mbd_poc
litedram_halfrate
acorn_pcie_compute_test
PCIe compute test on Acorn CLE 215+.litedram_ddr4_mig_phy_test
LiteDRAM Hybrid with DDR4 PHYlitex_thunderscope_test
Test of LiteX component for ThunderScope project.litex_verilog_axis_test
Integration test of Verilog AXI Stream modules (https://github.com/alexforencich/verilog-axis) with LiteX.litex_xtrx
XTRX LiteX/LitePCIe based alternative Gateware/Software.litex_64bit_addressing_test
Test/PoC of 64-bit addressing in LiteX.Love Open Source and this site? Check out how you can help us