enjoy-digital/litex_playground enjoy-digital/litex_playground

  • Stars
    star
    5
  • Rank 2,861,937 (Top 57 %)
  • Language
    C
  • Created over 4 years ago
  • Updated almost 3 years ago
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enjoy-digital/litex_playground
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enjoy-digital

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Repository Details

Small LiteX related projects that have been or could be useful...

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Take control of your Colorlight FPGA board with LiteX/LiteEth :)
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Test of the USB3 IP Core from Daisho on a Xilinx device
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litex_m2sdr

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PCIe analyzer experiments
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litex_vexriscv_smp_test

VexRiscv-SMP integration test with LiteX.
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18

xtrx_julia

XTRX LiteX/LitePCIe based design for Julia Computing
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litex_rp2040_pmod_test

Test of a RP2040 PMOD attached to a LiteX SoC.
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thunderscope

LiteX based FPGA gateware for Thunderscope.
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21

litex_verilog_axi_test

Integration test of Verilog AXI modules (https://github.com/alexforencich/verilog-axi) with LiteX.
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22

litesata_axiom

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23

fk33_hbm2_test

HBM2 integration test on FK33 with LiteX
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24

litex_hw_ci

LiteX Hardware CI tests.
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25

litex_vexriscv_smp_usb_host_test

Integration test with SpinalHDL's OHCI USB Host core and LiteX/VexRiscv-SMP.
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litex_neorv32_test

NEORV32 integration test with LiteX
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27

litex_soc_gen_test

Test of LiteX standalone SoC generator.
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28

litepcie_ptm_test

LitePCIe PTM support / test repo.
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29

tapcfg

tapcfg
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30

litex_naxriscv_test

NaxRiscv integration test with LiteX
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31

litex_limesdr_mini_v2_test

LiteX alternative SoC/Gateware for the LimeSDR Mini 2.0
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32

litex_openwrt_test

Test of OpenWRT on LiteX SoCs.
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betrusted_soc_power_tests

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34

vhdl2doc

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35

litex_agilex5_test

Initial Test/Support of LiteX on Intel Agilex5 FPGAs.
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36

litex_mister_test

Simplification test of MiSTer with LiteX to try to help/contribute to MiSTeX project.
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37

mbd_poc

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38

litedram_halfrate

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39

acorn_pcie_compute_test

PCIe compute test on Acorn CLE 215+.
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40

litedram_ddr4_mig_phy_test

LiteDRAM Hybrid with DDR4 PHY
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41

litex_thunderscope_test

Test of LiteX component for ThunderScope project.
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42

litex_verilog_axis_test

Integration test of Verilog AXI Stream modules (https://github.com/alexforencich/verilog-axis) with LiteX.
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43

litex_xtrx

XTRX LiteX/LitePCIe based alternative Gateware/Software.
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44

litex_64bit_addressing_test

Test/PoC of 64-bit addressing in LiteX.
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1
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