• Stars
    star
    124
  • Rank 288,207 (Top 6 %)
  • Language
    Rust
  • License
    Other
  • Created over 3 years ago
  • Updated 8 months ago

Reviews

There are no reviews yet. Be the first to send feedback to the community and the maintainers!

Repository Details

QEMU platform SBI support implementation, using RustSBI

QEMU support from RustSBI

RustSBI is designed as a library to craft a bootable binary or ELF file. However, QEMU provides us a way to load ELF file and implement simple SBI directly, thus RustSBI provides a bootable ELF file for this platform.

Try it out!

To prepare for environment, you should have Rust compiler and QEMU installed. You may install Rust by rustup or using vendor provided rustc and cargo packages. To install QEMU, your may need to use package manager (e.g. apt, dnf etc.) from system distribution to get a proper QEMU software package.

After environment prepared, compile and run with:

cargo qemu

When running cargo qemu, the test kernel will build and run. Expected output should be:

[rustsbi] RustSBI version 0.4.0-alpha.1, adapting to RISC-V SBI v1.0.0
.______       __    __      _______.___________.  _______..______   __
|   _  \     |  |  |  |    /       |           | /       ||   _  \ |  |
|  |_)  |    |  |  |  |   |   (----`---|  |----`|   (----`|  |_)  ||  |
|      /     |  |  |  |    \   \       |  |      \   \    |   _  < |  |
|  |\  \----.|  `--'  |.----)   |      |  |  .----)   |   |  |_)  ||  |
| _| `._____| \______/ |_______/       |__|  |_______/    |______/ |__|
[rustsbi] Implementation     : RustSBI-QEMU Version 0.2.0-alpha.2
[rustsbi] Platform Name      : riscv-virtio,qemu
[rustsbi] Platform SMP       : 8
[rustsbi] Platform Memory    : 0x80000000..0x88000000
[rustsbi] Boot HART          : 6
[rustsbi] Device Tree Region : 0x87e00000..0x87e01a8e
[rustsbi] Firmware Address   : 0x80000000
[rustsbi] Supervisor Address : 0x80200000
[rustsbi] pmp01: 0x00000000..0x80000000 (-wr)
[rustsbi] pmp02: 0x80000000..0x80200000 (---)
[rustsbi] pmp03: 0x80200000..0x88000000 (xwr)
[rustsbi] pmp04: 0x88000000..0x00000000 (-wr)

 _____         _     _  __                    _
|_   _|__  ___| |_  | |/ /___ _ __ _ __   ___| |
  | |/ _ \/ __| __| | ' // _ \ '__| '_ \ / _ \ |
  | |  __/\__ \ |_  | . \  __/ |  | | | |  __/ |
  |_|\___||___/\__| |_|\_\___|_|  |_| |_|\___|_|
================================================
| boot hart id          |                    6 |
| smp                   |                    8 |
| timebase frequency    |          10000000 Hz |
| dtb physical address  |           0x87e00000 |
------------------------------------------------
[ INFO] Testing `Base`
[ INFO] sbi spec version = 2.0
[ INFO] sbi impl = RustSBI
[ INFO] sbi impl version = 0x400
[ INFO] sbi extensions = [Base, TIME, sPI, HSM, SRST]
[ INFO] mvendor id = 0x0
[ INFO] march id = 0x70200
[ INFO] mimp id = 0x70200
[ INFO] Sbi `Base` test pass
[ INFO] Testing `TIME`
[ INFO] read time register successfully, set timer +1s
[ INFO] timer interrupt delegate successfully
[ INFO] Sbi `TIME` test pass
[ INFO] Testing `sPI`
[ INFO] send ipi successfully
[ INFO] Sbi `sPI` test pass
[ INFO] Testing `HSM`
[ INFO] Testing harts: [0, 1, 2, 3]
[DEBUG] hart 0 started
[DEBUG] hart 0 suspended nonretentive
[DEBUG] hart 1 started
[DEBUG] hart 1 suspended nonretentive
[DEBUG] hart 2 started
[DEBUG] hart 2 suspended nonretentive
[DEBUG] hart 3 started
[DEBUG] hart 3 suspended nonretentive
[DEBUG] hart 0 resumed
[DEBUG] hart 0 suspended retentive
[DEBUG] hart 0 stopped
[DEBUG] hart 1 resumed
[DEBUG] hart 1 suspended retentive
[DEBUG] hart 1 stopped
[DEBUG] hart 2 resumed
[DEBUG] hart 2 suspended retentive
[DEBUG] hart 2 stopped
[DEBUG] hart 3 resumed
[DEBUG] hart 3 suspended retentive
[DEBUG] hart 3 stopped
[ INFO] Testing Pass: [0, 1, 2, 3]
[ INFO] Testing harts: [4, 5, 7]
[DEBUG] hart 4 started
[DEBUG] hart 4 suspended nonretentive
[DEBUG] hart 5 started
[DEBUG] hart 5 suspended nonretentive
[DEBUG] hart 7 started
[DEBUG] hart 7 suspended nonretentive
[DEBUG] hart 4 resumed
[DEBUG] hart 4 suspended retentive
[DEBUG] hart 4 stopped
[DEBUG] hart 5 resumed
[DEBUG] hart 5 suspended retentive
[DEBUG] hart 5 stopped
[DEBUG] hart 7 resumed
[DEBUG] hart 7 suspended retentive
[DEBUG] hart 7 stopped
[ INFO] Testing Pass: [4, 5, 7]
[ INFO] Sbi `HSM` test pass
[ INFO] Testing `DBCN`
Hello, world!
[ INFO] writing slice successfully
[ INFO] reading 0 bytes from console
[ INFO] Sbi `DBCN` test pass

Run test kernel

Requirements

You should have cargo-binutils installed.

cargo install cargo-binutils

Run

Run with:

cargo test

It will run RustSBI-QEMU with a test kernel. The test kernel will test all SBI functions, its command emulation and other features. If it succeeds, there would be output like:

running 1 test
    Finished dev [unoptimized + debuginfo] target(s) in 0.14s
   Compiling test-kernel v0.1.0 (D:\RustProjects\rustsbi-qemu\test-kernel)
    Finished dev [unoptimized + debuginfo] target(s) in 0.61s
test run_test_kernel ... ok

test result: ok. 1 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 2.31s

Notes

  1. What kind of kernel does this project support?

    The rustsbi-qemu project supports raw binary kernels for educational or competition use. This project itself is only a showcase example illustrating how implementations should use RustSBI, it does not include a Linux boot support. You may visit downstream bootloader projects for a Linux capable bootloader.

  2. How to enable hypervisor H extension on QEMU?

    You should use these following line of parameters:

        command.args(&["-cpu", "rv64,x-h=true"]);

    ... to enable H extension on QEMU software.

    The H extension is enabled by default when QEMU version >= 7.0.0.

  3. What is the minimum supported Rust version of this package?

    You should build RustSBI-QEMU on nightly at least rustc 1.66.0-nightly (a24a020e6 2022-10-18).

License

This project is licensed under Mulan PSL v2.

Copyright (c) 2021-2023 RustSBI Team
RustSBI-QEMU is licensed under Mulan PSL v2.
You can use this software according to the terms and conditions of the Mulan PSL v2.
You may obtain a copy of Mulan PSL v2 at:
         http://license.coscl.org.cn/MulanPSL2
THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
See the Mulan PSL v2 for more details.

More Repositories

1

rustsbi

RISC-V Supervisor Binary Interface (RISC-V SBI) library in Rust; runs on M or HS mode; good support for embedded Rust ecosystem. For binary download see https://github.com/rustsbi/prototyper.
Rust
1,019
star
2

rustsbi-tutorial

rustsbi 开发教程
Rust
36
star
3

awesome-rustsbi

A curated list of awesome things related to rustsbi
35
star
4

rustsbi-k210

Kendryte K210 SBI support using RustSBI, provides privileged spec 1.12 environment by emulating it using 1.9.1
Rust
34
star
5

xuantie

Low level access to T-Head Xuantie RISC-V processors
Rust
32
star
6

slides

All public report slides and articles related to RustSBI
Rust
27
star
7

standalone

Rapid prototyping and selection package for pure-Rust RISC-V firmware, with RustSBI + UEFI or RustSBI + LinuxBoot
Rust
25
star
8

serde-device-tree

Serialize & deserialize device tree binary using serde
Rust
21
star
9

sbi-rt

Simple RISC-V SBI runtime library; designated for supervisor use
Rust
19
star
10

rustsbi-d1

RustSBI bootloader firmware and debug suite for Allwinner D1 SoC boards, including Nezha, Lichee and more
Rust
17
star
11

rustsbi-hifive-unmatched

RustSBI support on SiFive FU740 board; FU740 is a five-core heterogeneous processor with four SiFive U74 cores, and one SiFive S7 core
Rust
17
star
12

plic

Rust support for RISC-V Platform-Level Interrupt Controller
Rust
10
star
13

sbi-spec

Definitions and constants in RISC-V Supervisor Binary Interface (RISC-V SBI)
Rust
9
star
14

bouffalo-hal

Embedded Rust peripheral driver for Bouffalo IoT chips
Rust
6
star
15

sifive-core

Low level access to SiFive RISC-V processor cores
Rust
5
star
16

sophgo-hal

Sophgo chips support, including componentized hardware abstraction layer (HAL) and ROM runtime library
Rust
5
star
17

rustsbi-hpm

RustSBI bootloader firmware for HPMicro MCUs
Rust
5
star
18

sbi-testing

RISC-V SBI environment test suite
Rust
4
star
19

hpm6750-pac

Embedded Rust Peripheral Access Crate for HPMicro HPM6750 chip series
Rust
2
star
20

prototyper

RustSBI prototyper
Rust
2
star
21

clic

Core-Local Interrupt Controller (CLIC) RISC-V Privileged Architecture Extensions Rust crate support
Rust
1
star
22

base-address

Static and dynamic base address for peripheral buses.
Rust
1
star