• Stars
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    1
  • Language VHDL
  • License
    MIT License
  • Created about 3 years ago
  • Updated about 3 years ago

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Repository Details

Design and implementation of a RISC-V Single-Cycle processor based on the RV32I base instruction set. Modeling of the RV32I building blocks was done using VHDL. RISC-V assembly and code generation tools were used to load a set of 32-bit RISC-V instructions into instruction memory and execute these instructions on the processor.

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