• Stars
    star
    2
  • Language VHDL
  • License
    MIT License
  • Created almost 3 years ago
  • Updated almost 3 years ago

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Repository Details

Developed an AXI-Lite SPI Master IP Block in VHDL to interface with the Digilent ADXL345 Accelerometer through one of the Pmod connectors of a Zedboard - Xilinx Zynq-7000 SoC. To transfer a specific number of bytes between the SPI Master and Slave (Accelerometer) devices, I utilized the Programmable System (PS) fabric of the Xilinx Zynq device that includes a software-programmable processor. Developed using the C programming language the corresponding driver functions and an application program that implements a digital level, a tool that would return the angle of incline of the Zedboard.