jsyk/miilink jsyk/miilink

  • Stars
    star
    21
  • Rank 1,084,038 (Top 22 %)
  • Language VHDL
  • License
    MIT License
  • Created almost 9 years ago
  • Updated almost 9 years ago
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jsyk/miilink
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Repository Details

Connecting FPGA and MCU using Ethernet RMII

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