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  • Rank 1,807,489 (Top 36 %)
  • Language Verilog
  • Created almost 5 years ago
  • Updated over 4 years ago

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Repository Details

New hybrid ISA genetically splices the instruction pipeline of a RISC-V to the instruction pipelines of one or more SYMPL Compute Engines, giving you the best of both worlds in a single package.

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