KAWAZOME Ichiro (@ikwzm)
  • Stars
    star
    1,338
  • Global Rank 23,047 (Top 0.8 %)
  • Followers 259
  • Following 14
  • Registered over 12 years ago
  • Most used languages
    VHDL
    37.6 %
    Tcl
    19.4 %
    C
    17.2 %
    Shell
    11.8 %
    Makefile
    6.5 %
    Ruby
    3.2 %
    Python
    2.2 %
    C++
    1.1 %
    Verilog
    1.1 %
  • Location 🇯🇵 Japan
  • Country Total Rank 615
  • Country Ranking
    VHDL
    1
    Tcl
    2
    C
    42
    Makefile
    58
    Verilog
    68
    Shell
    176
    Ruby
    1,182
    C++
    3,666
    Python
    4,633

Top repositories

1

udmabuf

User space mappable dma buffer device driver for Linux.
C
535
star
2

FPGA-SoC-Linux

FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq-Zybo:PYNQ-Z1 Altera:de0-nano-soc:de10-nano)
C
158
star
3

ZynqMP-FPGA-Linux

FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq Ultrascale+ MPSoC)
126
star
4

dtbocfg

Device Tree Blob Overlay Configuration File System
C
72
star
5

fclkcfg

FPGA Clock Configuration Device Driver for Linux
C
24
star
6

ZynqMP-FPGA-Ubuntu18.04-Ultra96

Ubuntu 18.04 Desktop for Ultra96/Ultra96-V2
Shell
19
star
7

ZynqMP-ACP-Adapter

Xilinx ZynqMP AXI-ACP Adapter
VHDL
15
star
8

ZynqMP-FPGA-Ubuntu20.04

FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Ubuntu 20.04 Desktop Images (for Xilinx:Zynq Ultrascale+ MPSoC)
Shell
15
star
9

xf86-video-armsoc-xilinx

X.org graphics driver for ARM graphics(with Zynq UltraScale+ MPSoC)
C
13
star
10

ZynqMP-FPGA-Ubuntu20.04-Ultra96

Ubuntu 20.04 Desktop for Ultra96/Ultra96-V2
Shell
12
star
11

SECURE_HASH

SHA-1,SHA-256,SHA-512 Secure Hash Generator written in VHDL(RTL) for FPGA(Xilinx and Altera).
VHDL
11
star
12

uiomem

uiomem is a Linux device driver for accessing a memory area outside the Linux Kernel management from user space.
10
star
13

msgpack-vhdl

MessagePack implementation for VHDL
VHDL
10
star
14

fpgacfg

FPGA Configuration Interface for Linux FPGA Manager Framework
C
10
star
15

ZYBO_UIO_IRQ_SAMPLE

Sample of project using UIO(User Space IO) Interrupt(ZYBO/Linux/PUMP_AXI4).
C
10
star
16

msgpack-vhdl-examples

Example for msgpack-vhdl
9
star
17

MT32_Rand_Gen

Mersenne Twister Pseudo Random Number Generator written in VHDL(RTL) for FPGA(Xilinx and Altera).
VHDL
9
star
18

FPGA-SoC-Debian12

Debian12 Boot Image (U-boot, Linux Kernel, Debian12 RootFS) for ZYBO/ZYBO-Z7/PYNQ-Z1/DE10-Nano/DE0-Nano-SoC
8
star
19

PipeWork

Pipework components is VHDL library for NoC(Network on Chip).
VHDL
8
star
20

ZynqMP-FPGA-Linux-Example-2-Ultra96

ZynqMP-FPGA-Linux Example (2) binary and test code for Ultra96
Tcl
8
star
21

ZynqMP-FPGA-Xserver

X-Windows Server for ZynqMP-FPGA-Linux
8
star
22

u-dma-buf-kmod-dpkg

u-dma-buf(User space mappable DMA Buffer) kernel module debian package
Makefile
7
star
23

FPGA-SoC-Linux-Example-2-ZYBO-Z7

FPGA-SoC-Linux example(ï¼’) binary and project and test code for ZYBO-Z7
Tcl
6
star
24

qconv-strip-vhdl

This repository provides VHDL code for performing quantized convolution for deep neural networks on FPGA/ASIC.
VHDL
6
star
25

ZynqMP-FPGA-XRT-Example-1-Ultra96

Example for ZynqMP-FPGA-XRT(Xilinx RunTime for ZynqMP-FPGA-Linux)
Ruby
6
star
26

Dummy_Plug

Dummy Plug is a simple bus functional model library written by VHDL only.
VHDL
6
star
27

FPGA-SoC-U-Boot-ZYBO-Z7

U-Boot image for ZYBO-Z7
Shell
6
star
28

ZynqMP-U-Boot-Ultra96-V2

Boot Loader(U-Boot, FSBL, PMUFW,ATF) for Ultra96-V2
Tcl
6
star
29

FPGA-SoC-Linux-Example-1-ZYBO

FPGA-SoC-Linux example(1) binary and project and test code for ZYBO
Tcl
5
star
30

ZynqMP-FPGA-Ubuntu22.04-Desktop

Ubuntu 22.04 (Desktop) Boot Image (U-boot, Linux Kernel, Ubuntu RootFS) for Zynq MPSoC.
5
star
31

ZynqMP-FPGA-Debian11

Debian11 Boot Image (U-boot, Linux Kernel, Debian11 RootFS) for Zynq MPSoC.
5
star
32

JunkBox

Junk my documents and others
5
star
33

ZynqMP-FPGA-XRT

XRT(Xilinx Runtime) for ZynqMP-FPGA-Linux
Makefile
5
star
34

FPGA-SoC-U-Boot-DE10-Nano

U-Boot image for DE10-Nano
Shell
5
star
35

libmali-zynqmp

User space libraries for ZynqMP with Mali-400
C
5
star
36

FPGA-SoC-Linux-Example-1-DE10-Nano

FPGA-SoC-Linux example(1) binary and project and test code for DE10-Nano
VHDL
5
star
37

FPGA-SoC-Linux-Example-1-DE0-Nano-SoC

FPGA-SoC-Linux example(1) binary and project and test code for DE0-Nano-SoC
VHDL
5
star
38

PUMP_AXI4

Simple AXI4 Master Read and Write DMA module. Use PipeWork Components.
VHDL
4
star
39

FPGA-SoC-Linux-Example-1-PYNQ-Z1

FPGA-SoC-Linux example(1) binary and project and test code for PYNQ-Z1
Tcl
4
star
40

ZynqMP-FPGA-Linux-BNN-Ultra96

ZynqMP-FPGA-Linux Example BNN(Binarized Neural Network) binary and test code for Ultra96
Tcl
4
star
41

PYNQ-Festival

PYNQ Festival
Tcl
4
star
42

FPGA-SoC-U-Boot-PYNQ-Z1

U-Boot image for PYNQ-Z1
Shell
4
star
43

ZynqMP-FPGA-Ubuntu20.04-Lima-Ultra96

Ubuntu 20.04 Desktop for Ultra96/Ultra96-V2
Shell
4
star
44

rbvhdl

Ruby-based toolkit for VHDL
Ruby
4
star
45

zynqmp-gpu-kmod-dpkg

ZynqMP GPU (ARM Mali-400) Kernel Module Debian Package
4
star
46

FPGA-SoC-Linux-Example-1-ZYBO-Z7

FPGA-SoC-Linux example(1) binary and project and test code for ZYBO-Z7
Tcl
4
star
47

Merge_Sorter

merge sorter tree written by VHDL
VHDL
4
star
48

ArgSort-Ultra96

ArgSorter for Ultra96
VHDL
4
star
49

ZynqMP-U-Boot-UltraZed-EG-IOCC

Boot Loader(U-Boot, FSBL, PMUFW,ATF) for UltraZed-EG-IOCC
Tcl
3
star
50

nli_sha256_test

Neon Light SHA256 and AXI Master Test Bench
Verilog
3
star
51

bitonic_sorter

Bitonic Sorter Network written in VHDL
VHDL
3
star
52

PTTY_AXI

Pseudo TeleTYpe writer for FPGA.
VHDL
3
star
53

axi_slave_bfm_test

TestBench for axi_slave_BFM
VHDL
3
star
54

xilinx_axi_interconnect_test

Xilinx AXI Interconnect Test Project
VHDL
3
star
55

mesa-xlnx

This Repository provides an environment for building debian package for the mesa-xlnx.
3
star
56

vivado-pr-sample-pynqz1

Vivado Partial Reconfiguration Sample Project for PYNQ-Z1
VHDL
3
star
57

iroha-ruby

Iroha for ruby
VHDL
3
star
58

QCONV-STRIP-Ultra96

Quantized Convolution (strip) binary and project and test code for Ultra96
VHDL
3
star
59

cmabuf

Linux device driver for dma buffer using dma_alloc_coherent()
C
3
star
60

LED_AXI

LED Controller with AXI Slave I/F
VHDL
3
star
61

Least_Recently_Used_Selector

Least Recently Used Selector(LRU)
VHDL
3
star
62

Generic_Priority_Encoder

Generic Priority Encoder written in VHDL(RTL) for FPGA.
VHDL
3
star
63

dtbocfg-kmod-dpkg

Device Tree Blob Overlay Configuration File System kernel module debian package
Makefile
3
star
64

FPGA-SoC-Linux-Example-1-Base

FPGA-SoC-Linux example(1) source code repository
C
2
star
65

tcf-agent-dpkg

Target Communication Framework agent Debian Package
2
star
66

fru-print

Print FRU data of CC/SOM EEPROM
Python
2
star
67

udmabuf-kmod-dpkg

udmabuf(User space mappable DMA Buffer) kernel module debian package
Makefile
2
star
68

ZynqMP-FPGA-DNNDK

Xilinx DNNDK for ZynqMP-FPGA-Linux
Ruby
2
star
69

RasPi-Camera-V2-KV260

Raspberry Pi Camera V2 on KV260
Tcl
2
star
70

ArgSort-Kv260

ArgSort for Kv260
VHDL
2
star
71

PLBRAM-ZYBO-Z7

Sample project using BRAM on PL for ZYBO-Z7
Tcl
2
star
72

FPGA-SoC-U-Boot-DE0-Nano-SoC

U-Boot image for DE0-Nano-SoC
Shell
2
star
73

u-dma-buf-mgr

Kernel module to easily create or delete u-dma-bufUser space mappable DMA Buffer)
C
2
star
74

nli_axi_test

Neon Light AXI Master/Slave Test Bench
VHDL
2
star
75

ZynqMP-FPGA-Ubuntu22.04-Console

Ubuntu 22.04 (Console) Boot Image (U-boot, Linux Kernel, Ubuntu RootFS) for Zynq MPSoC.
Shell
2
star
76

PLBRAM-Ultra96

Sample project using BRAM on PL for Ultra96
Tcl
2
star
77

ZynqMP-FPGA-Debian12

Debian12 Boot Image (U-boot, Linux Kernel, Debian12 RootFS) for Zynq MPSoC.
2
star
78

ZynqMP-U-Boot-Ultra96

Boot Loader(U-Boot, FSBL, PMUFW,ATF) for Ultra96
Tcl
2
star
79

PipeWorkTest

Pipework components is VHDL library for NoC(Network on Chip).
VHDL
2
star
80

FPGA-SoC-Linux-Kernel-6.1

Linux Kernel (6.1) Image, Device Trees, Debian Packages for Zynq , CycloneV SoC
2
star
81

xlnk-kernel-module

This repository provides an environment for building "xlnk" as a kernel module. "xlnk" is Xilinx APF Accelerator driver.
C
2
star
82

ZynqMP-FPGA-Linux-Example-2-Ultra96-issue-1

This repository is to reproduce the phenomenon that was problematic in issue-1 of https://github.com/ikwzm/ZynqMP-FPGA-Linux-Example-2-Ultra96.git
Tcl
2
star
83

K26-Fan-Enable

Fan-enabled PL bitstreams for KV260/KR260
Tcl
1
star
84

msgpack-vhdl-test

Test environment for msgpack-vhdl.
VHDL
1
star
85

fpga-region-manager

fpga-region-manager is a Linux Kernel module for programming FPGA while safely changing the clock frequency.
C
1
star
86

ZYBO_Z7_PUMP

ZYBO Z7 Sample Project with PUMP_AXI4 and LED_AXI
Tcl
1
star
87

vivado-hls-axi-dma-read-failure

Project where DMA Read made with Vivado-HLS failed in post-synthesis simulation
C++
1
star
88

ZynqMP-FPGA-Linux-Example-3-UltraZed

ZynqMP-FPGA-Linux Example (3) binary and test code for UltraZed-EG-IOCC
Tcl
1
star
89

QCONV-STRIP-DE10-Nano

Quantized Convolution (strip) binary and project and test code for DE10-Nano
VHDL
1
star
90

ATLAS_PUMP

Altera DE0-Nano-SoC Sample Project with PUMP_AXI4 and LED_AXI
VHDL
1
star
91

FIFO_with_done

FIFO with done VHDL RTL Model (PipeWork example)
VHDL
1
star
92

XSadd_Rand_Gen

XORSHIFT-ADD(XSadd) Pseudo Random Number Generator written in VHDL(RTL) for FPGA(Xilinx and Altera).
VHDL
1
star
93

xilinx_axi_interconnect_test_2

Xilinx AXI Interconnect Test Project(2)
VHDL
1
star
94

ZynqMP-FPGA-Linux-Example-2-UltraZed

ZynqMP-FPGA-Linux Example (2) binary and test code for UltraZed-EG-IOCC
Tcl
1
star
95

convolution-vhdl

Convolution components VHDL library for Neural network.
1
star
96

xmutil-dpkg

Repository for build xmutil debian package
Shell
1
star
97

ZYBO_PUMP

ZYBO Sample Project with PUMP_AXI4 and LED_AXI
C
1
star
98

ZynqMP-FPGA-Linux-Kernel-6.1

Linux Kernel (6.1) Image/Device Trees/Debian Packages for Zynq MPSoC.
1
star
99

ZynqMP-FPGA-Linux-Example-0-UltraZed

ZynqMP-FPGA-Linux Example (0) binary and test code for UltraZed-EG-IOCC
Python
1
star
100

MMU_AXI

MMU(Memory Management Unit) and ATS(Address Translation Service) for AXI Master to Host Memory.
VHDL
1
star