xjtuiair-cag/Open-HiPU200 xjtuiair-cag/Open-HiPU200

  • Stars
    star
    9
  • Rank 1,929,118 (Top 39 %)
  • Language SystemVerilog
  • Created over 2 years ago
  • Updated over 2 years ago
Twitter logo Share LinkedIn logo Share Facebook logo Share
xjtuiair-cag/Open-HiPU200
github

xjtuiair-cag

Reviews

There are no reviews yet. Be the first to send feedback to the community and the maintainers!

Repository Details

HiPU200 open-source version is a DNN accelerator, using RISC-V instruction set and customized vector/matrix extension.

More Repositories

1

XJTU-Tripler

XJTU-Tripler is based on HiPU100, an FPGA-friendly DNN accelerator, developed by CAG, Institute of AI & Robotics, XJTU.
VHDL
174
star
2

Matterhorn

A novel general neuromorphic computing framework based on PyTorch.
Python
13
star
3

Vscale_plus

A 3-stage in-order single-scalar RISC-V processor
Verilog
9
star
4

gem5_dda

A gem5 experimental repo in order to explore Data-dependent Access (DDA).
C++
4
star
5

xjtucag-benchmarks

Fortran
1
star
6

dmp

Dmp: differential matching prefetcher
1
star