samlam723/median_filter samlam723/median_filter

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  • Language Verilog
  • Created over 3 years ago
  • Updated over 3 years ago
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samlam723/median_filter
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samlam723

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Repository Details

A chip that functions as an efficient 1-D median filter is implemented in this project. The ASIC design flow, from high level specification definition down to final layout extraction and simulation are completed.

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