m1geo/verilog-snippets

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Language Verilog
Created over 5 years ago
Updated almost 5 years ago

m1geo/verilog-snippets

m1geo

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Random snippets of Verilog for others to use

Pi5_PCIe

A crude reverse engineering of the Pi5 PCIe connector & potential breakout boards.

CIC-Filter

A simple and crude CIC filter implementation in Python3 for learning purposes

MAX6921_VFD_GPS_Clock

Clock that uses TinyGPS to crack GPS strings and displays the time/date on 6 statically driven VFD tubes via 3 MAX6921s

Quad-AMBE3000

A PCB for four DVSI AMBE-3000R Vocoders for use with WebSDRs/Audio transcoding

DTSCS

Decentralized Time-Synchronized Channel Swapping (DT-SCS) for Ad Hoc Wireless Networks

Cloudlog-ADIF-Uploader

Python3 based Cloudlog uploader based around adif-io and JSON POST requests to Cloudlog API

MediaWiki-to-WordPress

MediaWiki to WordPress Converter based on http://www.analogrithems.com/rant/portfolio/mediawiki2wordpress/

Pi5-Artix-FPGA-Hat

An AMD/Xilinx Artix 50T FPGA on a Pi5 Hat with PCIe and GPIO interconnects as well as SPI programming

EH_IOT

Energy Harvesting For The Internet-of-Things: Measurements And Probability Models (Testbed and Analysis Code)

arty_hdmi

A simple test pattern on HDMI display

ESP8266-Air-Quality-Sensor

An air quality recorder based on an ESP8266, CCS811, BME280 and DHT22 which logs to ThingSpeak

RigHop

Program to sync frequency hopping with an Icom amateur radio transceiver using an NTP synced PC clock and CI-V

handifinder

KiCad 5.1 design of the HANDI-Finder Project

UNV

UNV: Content Centric Live Video Streaming System

JamesSharmanPipelinedCPU

An FPGA implementation of James Sharman's Pipelined CPU: https://www.youtube.com/watch?v=KEwL2P8IGaA

frequency-counter

A frequency counter based around Ublox GPS 1PPS, Lattice MachX02 FPGA, Arduino Uno and LCD

WordClock

A custom WordClock project.

contiki-temperature

Takes measurements from Temperature, Humidity, Visible and IR Light and saves them to flash memory.

IV16-Numitron-Clock

An FPGA based IV-16 Numitron Clock

contiki-packet-delivery-ratio

Simple Contiki code for multichannel PDR measurement

arty_vga

A working attempt at 800x600 VGA using an Arty A7 dev board (Artix A7T35 FPGA) with SPI interface and example Arduino code