• Stars
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    3
  • Rank 3,963,521 (Top 79 %)
  • Language Verilog
  • Created over 4 years ago
  • Updated over 4 years ago

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Repository Details

This project is a Serial Peripheral Interface (SPI) which was developed with a hardware description language (HDL) called Verilog. The goal of the project is to implement a serial peripheral interface (SPI) system with the use of a master and slave device. This interface receives 32 data cases from the device in which all must pass in order for it to work. Using this information retrieved from the successful cases of the interface, the data was then analyzed with GTKWave. The GTKWave shows the project is successful, as the numbers are going from right to left in the wave graph.