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samo
SAMO: Streaming Architecture Mapping Optimisationfpgaconvnet-tutorial
A collection of tutorials for the fpgaConvNet framework.fpgaconvnet-model
Performance and resource models for fpgaConvNet: a Streaming-Architecture-based CNN Accelerator.fpgaconvnet-hls
4NEC2_helical_gen
source code to generate .nec files for helical wire antennasfpgaconvnet-optimiser
Optimiser for mapping convolutional neural network models to FPGA platforms.pommel
Analysing power consumption of the memory subsystem for machine learning applicationsdef
DEF: Differential Encoding of Featuremaps for Low Power Convolutional Neural Network Acceleratorssatay
huffman-chisel
A Chisel implementation of Huffman coding for a static code tablealexmontgomerie
rle-chisel
A Chisel implementation of single-value Run Length Encoding (RLE)fpgaconvnet-website
The work done at the Intelligent Digital Systems Lab at Imperial College London aims to address this demand with fpgaConvNet: a toolflow for designing Convolutional Neural Network (CNN) accelerators for FPGAs with state-of-the-art performance and efficiency.SMORE
Silent Mapping Order Randomisation EngineEmbeddedSystems-EIE3
Embedded systems course at Imperial College London 2018DSD_v2
zedboard_mem_testing
ML
braille_boys
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