Discover ATaylorCEngFIET/mz_365 Open Source project

Slides and lab instructions for the mastering MicroBlaze session

132

Mastering-MicroBlaze

Vitis_Hero

C++

Genesys_ZU_MIPI_PCAM

Imaging application using MIPI and DisplayPort to process image

Source files for Getting to Know Vivado course

Getting-to-Know-Vivado

Slides and material for Xilinx bootcamp

Xilinx_BootCamp

Building-Accelerated-Applications-with-Vitis

Support material for the Building Accelerated Applications with Vitis webinar series

Parallella-Chronicles

Source code form the Parallella Chronicles Blog

Element14_PYNQ

CrowdSupplyWorkShop1

introduction_to_vivado

Professional-PYNQ

MZ_402_PID_HLS

PID HLS Implementation

Files for the hello ultra 96 lab

fedevel

Hello_Ultra96

UltraZed-Edition

UltraZed Edition examples

SP701_Imaging_Vivado

Vivado project for the SP701 Imaging application project

Bare Metal Display Port Example for the Ultra96 V2

Ultra96V2_DisplayPort

MicroBlaze petalinux targeting Arty A7 100T, UART, QSPI, Ethernet, XADC, GPIO

microblaze_linux

perfecting_petalinux

Mastering_AMD_MicroBlaze_Processor_The_PetaLinux_Class

Digilent_bootcamp

Kira_PCAM

KRIA and PCAM baremetal

Slides for all about HLS webinar

all_about_hls

Zynq_multiboot

Part_217_SPI_Master_Salve

SPI example based on using the Arty Z7 with master and slave examples for the PS SPI controller and the AXI Quad SPI controller

Neopixel overlay for the PYNQ Z2

pynq_neopixel

MicroBlaze code based on the Digilent Arty Board

Arty-Chronicles

MZ_439

Vivado and Vitis files for the MZ Blog 439

Intel Companion chip for STM32 using Max1000

Intel_Max1000

UltraZed_PCIe

UltraZed and PCIe example

IP block for driving NeoPixels from a FPGA - Device independent

neo_pixel_ip

Arty S7 Example with Pmods and MTDS

Arty_s7_example

Solution to the Hackster Arm M1 lab

Edge_Impluse_ML_Agri

Hackster_ARM_M1_Lab2

Example if MQTT on the MicroBlaze running Petalinux

MQTT_MicroBlaze_Petalinux

MZ448

Vivado design for the VITIS Acceleration Platform

Concept_to_Prototype_U96_VITIS

Slides and Lab guide for the EOC Vitis Session.

CrowdSupplyWorkShop2

EOC_Vitis

vivado_sd_image_processing-

Vivado design for the SD Image processing overlay

MZ_431

7 Series IDELAY / ODELAY

Introduction to high reliability webinar

basys3_pong

Makefile

Introduction_to_high_rel

Ultra96V2_MIPI_PCAM_VITIS

Ultra96 with MIPI break out board connected to the PCam5 Bare metal to Display Port solution

Nexys video with FMC HDMI

Navigating_niosv

Nexys_Video_Part220

Memory Scrubber Xilin BRAM and URAM

MZ459

SLX_FPGA

Code for SLX FPGA Blog

SDSoC_Platforms

SDSoC Platforms

MIPI Imaging on the ZynqBerry Zero Vitis / Vivado 2020.2

ZynqBerry_Zero_MIPI

For MicroZed Chronicles Blog 433 Partial Reconfiguration

EOC_DSP

MZ_433

Verilog

UltraZed_Part18

VDMA transfer from the PL to the PS

HLS Implementation of a HUD for image processing systems.

HUD

Objective-C

Concept_to_Prototype_U96-PYNQ

PYNQ overlay for the concept to prototype ultra96 webinar

IOTCL I2C Dev and SPI Dev using Petalinux

MZ507

Design example on Zed board to use channel one ADV7611 of the http://store.digilentinc.com/fmc-hdmi-dual-hdmi-input-expansion-card/

FMC-HDMI-Zed

M1_from_scratch

FLIR Lepton 2 PYNQ overlay for the PYNQ Z2

FLIR_LEPTON_PYNQ

MiniZed Hardware design connected to FLIR lepton and 7 inch touch display, HW build still has WIFI & BT module

ARM-M1-M3-Lab

Arm M1 M

MiniZed-FLIR-Lepton-2

PYNQ 2v5 Image processing overlay for the Snickerdoodle

pynq_sd_image_processing

FLIR_LEPTON2

FLIR Lepton 2 on Arty Z7

Scripts for MicroZed Chronicles 428

mz_428

Example of Multiboot and fallback using a FPGA

FPGA_Multiboot

Robot Arm Project for PYNQ

PYNQ_Robot_Arm

eink_fpga

Vivado Project for the PYNQ Lepton overlay include the custom RTL

FLIR_LEPTON_PYNQ_VIVADO

Xilinx Simulation Interface example for Vivado 2020.1

Nexys

Projects for Nexys

mz_363

C++

MiniZed_Thermal

MiniZed Thermal Imager for the https://www.hackster.io/adam-taylor/portable-thermal-imaging-with-the-minized-db4369 project

Catapult-HLS

Source for the Mentor Catapult HLS Blog

MZ508

Vivado_Blocks

Mixer example with test pattern generators and FLIR Lepton

MiniZed_FLIR_MIXER

Vitis Platforms I have created

mz_chronicles_356

Vitis_Platforms

BRAM_Update

Project corresponding to MZ Chronicles BRAM Update Article

Repo for MZ Chronicles 354

mz_chronicles_354

Vivado Design Behind the PYNQ layout

Concept_to_Prototype_U96-PYNQ-Vivado

Demo 1 for the concept to prototype ultra96v2 webinar, this is a 720p 24bpp, 8 bit RGB image, output over display port

Concept_to_Prototype_U96

Files for MicroZed Chronicles edition 362

mz_362_simulation

Source control with vivado example

Source_control_example