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MicroZed-Chronicles
Source code from the MicroZed Chronicles blog hosted by Xcell Daily BlogHackster
Files used with hackster examplesMastering-MicroBlaze
Slides and lab instructions for the mastering MicroBlaze sessionVitis_Hero
Genesys_ZU_MIPI_PCAM
Imaging application using MIPI and DisplayPort to process imageGetting-to-Know-Vivado
Source files for Getting to Know Vivado courseXilinx_BootCamp
Slides and material for Xilinx bootcampBuilding-Accelerated-Applications-with-Vitis
Support material for the Building Accelerated Applications with Vitis webinar seriesParallella-Chronicles
Source code form the Parallella Chronicles BlogElement14_PYNQ
CrowdSupplyWorkShop1
introduction_to_vivado
Professional-PYNQ
MZ_402_PID_HLS
PID HLS Implementationfedevel
Hello_Ultra96
Files for the hello ultra 96 labUltraZed-Edition
UltraZed Edition examplesSP701_Imaging_Vivado
Vivado project for the SP701 Imaging application projectUltra96V2_DisplayPort
Bare Metal Display Port Example for the Ultra96 V2microblaze_linux
MicroBlaze petalinux targeting Arty A7 100T, UART, QSPI, Ethernet, XADC, GPIOperfecting_petalinux
Mastering_AMD_MicroBlaze_Processor_The_PetaLinux_Class
mz_365
AXI VIP exampleDigilent_bootcamp
Kira_PCAM
KRIA and PCAM baremetalall_about_hls
Slides for all about HLS webinarZynq_multiboot
Part_217_SPI_Master_Salve
SPI example based on using the Arty Z7 with master and slave examples for the PS SPI controller and the AXI Quad SPI controllerpynq_neopixel
Neopixel overlay for the PYNQ Z2Arty-Chronicles
MicroBlaze code based on the Digilent Arty BoardMZ_439
Vivado and Vitis files for the MZ Blog 439Intel_Max1000
Intel Companion chip for STM32 using Max1000UltraZed_PCIe
UltraZed and PCIe exampleneo_pixel_ip
IP block for driving NeoPixels from a FPGA - Device independentArty_s7_example
Arty S7 Example with Pmods and MTDSEdge_Impluse_ML_Agri
Hackster_ARM_M1_Lab2
Solution to the Hackster Arm M1 labMQTT_MicroBlaze_Petalinux
Example if MQTT on the MicroBlaze running PetalinuxMZ448
Concept_to_Prototype_U96_VITIS
Vivado design for the VITIS Acceleration PlatformCrowdSupplyWorkShop2
EOC_Vitis
Slides and Lab guide for the EOC Vitis Session.vivado_sd_image_processing-
Vivado design for the SD Image processing overlaybasys3_pong
Introduction_to_high_rel
Introduction to high reliability webinarUltra96V2_MIPI_PCAM_VITIS
Ultra96 with MIPI break out board connected to the PCam5 Bare metal to Display Port solutionNavigating_niosv
Nexys_Video_Part220
Nexys video with FMC HDMIMZ459
Memory Scrubber Xilin BRAM and URAMSLX_FPGA
Code for SLX FPGA BlogSDSoC_Platforms
SDSoC PlatformsZynqBerry_Zero_MIPI
MIPI Imaging on the ZynqBerry Zero Vitis / Vivado 2020.2EOC_DSP
MZ_433
For MicroZed Chronicles Blog 433 Partial ReconfigurationUltraZed_Part18
VDMA transfer from the PL to the PSHUD
HLS Implementation of a HUD for image processing systems.Concept_to_Prototype_U96-PYNQ
PYNQ overlay for the concept to prototype ultra96 webinarMZ507
IOTCL I2C Dev and SPI Dev using PetalinuxFMC-HDMI-Zed
Design example on Zed board to use channel one ADV7611 of the http://store.digilentinc.com/fmc-hdmi-dual-hdmi-input-expansion-card/M1_from_scratch
FLIR_LEPTON_PYNQ
FLIR Lepton 2 PYNQ overlay for the PYNQ Z2ARM-M1-M3-Lab
Arm M1 MMiniZed-FLIR-Lepton-2
MiniZed Hardware design connected to FLIR lepton and 7 inch touch display, HW build still has WIFI & BT modulepynq_sd_image_processing
PYNQ 2v5 Image processing overlay for the SnickerdoodleFLIR_LEPTON2
FLIR Lepton 2 on Arty Z7mz_428
Scripts for MicroZed Chronicles 428FPGA_Multiboot
Example of Multiboot and fallback using a FPGAPYNQ_Robot_Arm
Robot Arm Project for PYNQeink_fpga
FLIR_LEPTON_PYNQ_VIVADO
Vivado Project for the PYNQ Lepton overlay include the custom RTLNexys
Projects for Nexysmz_363
Xilinx Simulation Interface example for Vivado 2020.1MiniZed_Thermal
MiniZed Thermal Imager for the https://www.hackster.io/adam-taylor/portable-thermal-imaging-with-the-minized-db4369 projectCatapult-HLS
Source for the Mentor Catapult HLS BlogMZ508
Vivado_Blocks
MiniZed_FLIR_MIXER
Mixer example with test pattern generators and FLIR Leptonmz_chronicles_356
Vitis_Platforms
Vitis Platforms I have createdBRAM_Update
Project corresponding to MZ Chronicles BRAM Update Articlemz_chronicles_354
Repo for MZ Chronicles 354Concept_to_Prototype_U96-PYNQ-Vivado
Vivado Design Behind the PYNQ layoutConcept_to_Prototype_U96
Demo 1 for the concept to prototype ultra96v2 webinar, this is a 720p 24bpp, 8 bit RGB image, output over display portmz_362_simulation
Files for MicroZed Chronicles edition 362Source_control_example
Source control with vivado exampleTackling_Timing
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