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AVR-Processor-Design-in-VHDL
Designed, implemented, and tested an 8-bit RISC AVR processor in VHDL & assembly. Authors: Sung Hoon Choi & Garret Sullivan. Instructor: Glen GeorgePDF-Portfolios
Projects at Caltech done by Sung Hoon ChoiParallel-architecture-designs-using-systolic-arrays-in-VHDL
Digital designs that do parallel computation through by utilizing processing elements (PE's). They are part of assignments for Advanced Digital Designs course (EE119B) at Caltech.GPU-Programming-with-CUDA
Multi variable regression implemented for CPU and GPU. Programmed in C++ with CUDASerial-Divider-Non-Restoring-Algorithm-in-VHDL
A serial divider based on the non-restoring algorithm. Implemented on a hardware board of key inputs and 7-segment displaysMachine-Learning-in-Python-Numpy
Python codes that I wrote for the machine learning course at Caltech (CS156). Numpy was used.Love Open Source and this site? Check out how you can help us