There are no reviews yet. Be the first to send feedback to the community and the maintainers!
Fixed-Floating-Point-Adder-Multiplier
16-bit Adder Multiplier hardware on Digilent Basys 3Carry-Save-Multiplier
Parameterized and 4-bit carry save multiplier designIR-Transreceiver
Encoder and decoder modules for infrared receivers, transmitters and remotesInteger-Multiplier-Hardware-Parameterized
Source code for pure combinational 16 bit integer multiplier hardwareDigital_Clock
Verilog code for a digital clockQueue-Management-System
Simple queue management systemVerilog-Utilty-Modules
Collection of utility modules written in VerilogHC-SR04
Verilog interface for HC-SR04 Ultrasonic Ranging ModuleDivider
Hardware integer divider moduleVSC-Snippets
Some snippets for Verilog HDL to be used in VS CodexorshiftPlus
Pseudorandom number generatorUART-Tool
Serial communication tool written in Python 3MCP4725
Interface module for MCP4725 DACSTC
Sensitivity Time Control function implementation with a simple sea clutter generator and radar interfaceSequential-CRC-Generator
Pair of modules to calculate crc values sequentiallyAXIS-Split
Splits one AXI-Stream transmission to two.AXI-GPIO
Custom AXI GPIO core with up to 32 input and 32 output portsSimple-UART
Set of simple modules to communicate via UARTLove Open Source and this site? Check out how you can help us