refaay/CMOS_Standard_Cell_Library

Stars
1
Language AGS Script
Created about 6 years ago
Updated over 5 years ago

refaay/CMOS_Standard_Cell_Library

refaay

There are no reviews yet. Be the first to send feedback to the community and the maintainers!

CMOS standard cell library (schematic and layout) using Electric VLSI and SPICE sim, Spring 18

Adders-and-Array-Multiplier

The modules are: • n-bit Ripple Carry Adder (RCA) [parameter: n] • n-bit Carry Look-ahead Adder (CLA); n=2, 3, 4 [parameter: n] • n-bit Carry Select Adder [parameters: n (multiple of k), block size (k), and block type (CLA or RCA)] • nxm unsigned array multiplier [parameters: n and m; each should be a power of 2 number].

Faster-R-CNN-resnet50-PASCAL-VOC-2007

This project implements a neural network that can best detect the 20 different object classes of the PASCAL VOC 2007 challenge using the Keras and Tensorflow frameworks on Python 2.7. It uses Faster R-CNN resnet50 model is loaded with pre-trained weights.

MIPS-Pipelined-Processor-GUI-Simulator

R4000 Pipelined MIPS CPU in GUI using C++ & Qt in a team. Computer Architecture. Spring 17

Pipelined-MIPS-Processor

Pipelined RISC Architecture MIPS Processor using Verilog. Full pipelined with forwarding, stalling, and branch control hazard unit (minor errors with race conditions and sw forwarding, no jump). Spring 17.