• Stars
    star
    12
  • Rank 1,597,372 (Top 32 %)
  • Language Verilog
  • License
    ISC License
  • Created over 3 years ago
  • Updated over 3 years ago

Reviews

There are no reviews yet. Be the first to send feedback to the community and the maintainers!

Repository Details

fpga i2c rtc oled based clock with alarm supports buzzer

More Repositories

1

kianRiscV

RISC-V Linux SoC, marchID: 0x2b
AGS Script
671
star
2

my_hdmi_device

New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi standard. Supports DDR and SRD tranfser!
GLSL
88
star
3

lets_build_a_compiler_for_riscv

A c/RISCV of "Let's Build a Compiler" by Jack Crenshaw
C
50
star
4

my_sdram

simple sdram controller
Verilog
17
star
5

i2c_oled_fpga_bresenham

i2c fpga oled sdd1306 bresenham implementation
Verilog
12
star
6

kianFpgaPong

Basic Pong you can extend with rotary, sound, vga generator and autopilot
Verilog
11
star
7

KianV_rv32ia_uLinux_SoC

Verilog
10
star
8

i2c_sdd1306_framebuffer

It is a fpga implementation of an i2c master, framebuffer for sdd1306 display
Verilog
9
star
9

KianV-RV32IMA-RISC-V-uLinux-SoC

Verilog
3
star
10

fpga_neo_pixel

My approach is using a SPI to collect 24-RGBs-Strips-Data and a SYNC from a impeded SoC. Another approach I came up with is to reuse the Adafruit-Neopixel-Library. I attached my FPGA_NeoPixel.h file. Technically it inherits from Adafruit_NeoPixel and overwrites the void show() with SPI-Code so you are able to use the methods from Adafruit_Neopixel to set leds or calculate color spaces. I have tested it on an Arduiono-Nano but it is easy to port the Libs to other SoCs.
Verilog
2
star
11

my_multiplier

one cycle unsigned multiplier, don't cares of resources fpga or asic structures
Verilog
1
star
12

my_uart

UART implementation with a top module implements a loopback. I was able to have 3MBaud error-free!
Verilog
1
star