nelsoncsc/ISP_UVM nelsoncsc/ISP_UVM

  • Stars
    star
    85
  • Rank 385,668 (Top 8 %)
  • Language SystemVerilog
  • License
    MIT License
  • Created almost 7 years ago
  • Updated almost 7 years ago
Twitter logo Share LinkedIn logo Share Facebook logo Share
nelsoncsc/ISP_UVM
github

nelsoncsc

Reviews

There are no reviews yet. Be the first to send feedback to the community and the maintainers!

Repository Details

A Framework for Design and Verification of Image Processing Applications using UVM

More Repositories

1

easyUVM

A simple UVM example with DPI
SystemVerilog
35
star
2

sv_image

Reusable image processing modules in SystemVerilog
SystemVerilog
32
star
3

FFT

Hardware implementation of a Fixed Point Recursive Forward and Inverse FFT algorithm
SystemVerilog
14
star
4

basic_uvmc_oct

A simple UVM testbench using UVM Connect and Octave
SystemVerilog
9
star
5

sv_math

Reusable math modules (multiplication, division, square root and logarithm) in SystemVerilog
SystemVerilog
7
star
6

smarts

This repository contains several examples and problems in Modern Control including: neural networks, expert systems, genetic algorithms.The codes are implemented in Matlab/Octave and CLIPS. Each task has its own description in a pdf report. The overview of the all tasks can be seen in the file smarts.pdf
MATLAB
4
star
7

basic_uvmc

A simple testbench with two refmods using UVM Connect
SystemVerilog
3
star
8

FIR_FILTER

FIR Filter Generation and Audio Processing in Altera DE2
Verilog
3
star
9

systems-id

This repository contains several examples and problems in Systems Identification and Estimation.The codes are implemented in Matlab/Octave.
MATLAB
2
star
10

ADUC_7026

This repository contains an implementation of the Protocol I2C using the microncontroller ADUC 7026. The communication is between one master with two slaves.
C
1
star
11

basicSV

Very basic SystemVerilog examples
SystemVerilog
1
star