Mario-Zuniga/Multiplier-Divisor-Square_Root Mario-Zuniga/Multiplier-Divisor-Square_Root

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  • Language SystemVerilog
  • Created over 6 years ago
  • Updated over 6 years ago
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Mario-Zuniga/Multiplier-Divisor-Square_Root
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Mario-Zuniga

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Repository Details

MDR designed with structural System Verilog, all operations are beign done with one Add-Subtract module, and sended to a 32 bit BCD to be displayed on digital segments.

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