Discover rithiksachdeva/Computer-Architecture Open Source project

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Language
Assembly
Created over 3 years ago
Updated over 3 years ago

rithiksachdeva

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Collection of RISC-V assembly projects from my UC Davis Computer Architecture class. Each project features unique objectives focused on various aspects of assembly programming such as calculating mathematical equations, sorting arrays, and implementing search algorithms. All programs are designed to work in the RARS simulator.

EEC180-Verilog

This repository contains Verilog modules designed for signal processing and matrix operations. 'task1' performs Multiply-Accumulate (MAC) operations key for filters and transforms. 'task2' and 'task3' utilize MAC units, digital logic components, and RAM for operations on 8-bit signed integer matrices.

Verilog

Hobby-Projects

Some projects I did on my own time.

Python

Senior-Design-Project

Python

Operating-Systems

UC Davis Operating Systems Projects: creating a simple shell to explore UNIX system calls, developing a user-level thread library to grasp thread operations, including creation, execution, context switching, and synchronization, implementing a FAT-based virtual file system software stack, aimed at understanding file system management in software.