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@PyHDI

PyHDI

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Registered about 9 years ago
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Pyverilog

Python-based Hardware Design Processing Toolkit for Verilog HDL

veriloggen

Veriloggen: A Mixed-Paradigm Hardware Construction Framework

PyCoRAM

Python-based Portable IP-core Synthesis Framework for FPGA-based Computing

zynq-linux

How to configure Debian Linux environment for Xilinx Zynq.

ipgen

IP-core package generator for AXI4/Avalon

flipSyrup

Cycle-Accurate Hardware Simulation Framework on Abstract FPGA Platforms

hardcheck

Automatic Hardware Design Translator for Checkpointing and Live Migration on FPGAs

mulpy

MULPY: A Multi-Paradigm High-Level Hardware Design Framework in Python