Steve G (@stiggy87)
github

stiggy87

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  • Stars
    star
    118
  • Global Rank 183,222 (Top 7 %)
  • Followers 23
  • Following 15
  • Registered over 13 years ago
  • Most used languages
    Tcl     50.0 %
    VHDL     25.0 %
    Prolog
         25.0 %
  • Location ๐Ÿ‡บ๐Ÿ‡ธ United States
  • Country Total Rank 40,863
  • Country Ranking
    VHDL     19
    Tcl     71
    Prolog
         129

Top repositories

1

ZynqBTC

A Bitcoin miner for the Zynq chip utilizing the Zedboard.
VHDL
100
star
2

source_to_inst

This is a TCL script that will take in Verilog and VHDL files and generate an instantiation template appropriately for the user to use in their design.
Tcl
10
star
3

Project_Kirov

Autonomous Blimp/Zeppelin for Sparkfun AVC
Prolog
3
star
4

adept_tcl

TCL package written to handle the some of the file export capabilities found in Jim Wu's ADEPT software (https://sites.google.com/site/adepthome/home).
Tcl
2
star
5

pfSenseZ

pfSense ported to the Zedboard (can be adapted to work on any Zynq chip)
1
star