Patryk Mężydło (@pmezydlo)
github

pmezydlo

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  • Stars
    star
    112
  • Global Rank 191,524 (Top 7 %)
  • Followers 27
  • Following 10
  • Registered over 9 years ago
  • Most used languages
    Verilog     40.0 %
    Python
         20.0 %
    OpenEdge ABL     20.0 %
    C
         20.0 %
  • Location 🇵🇱 Poland
  • Country Total Rank 1,763
  • Country Ranking
    OpenEdge ABL     1
    Verilog     4
    C
         114
    Python
         3,110

Top repositories

1

SPI_slave_driver_implementation

The project enables easy to implement realization of SPI slave for McSPI controller.
C
59
star
2

BeagleWire

This repository contains software for BeagleWire. It is a realization of my project for GSOC-2017
Verilog
45
star
3

BBB_PRUSSv2_SM

BeagleBone Black - Simple PRUSSv2 driver for stepper motor.
OpenEdge ABL
6
star
4

DE0-Nano-SOC-VGA

VGA RGB 8 colors 640x480 60Hz
Verilog
3
star
5

Oscilloscope_LAN_data_capture

Capture the data of a Rigol DS1000Z series oscilloscope by LAN only, using python and postgresql, no USB and no Rigol drivers.
Python
3
star