Omkar Bhilare (@ombhilare999)
github

ombhilare999

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  • Stars
    star
    68
  • Global Rank 273,892 (Top 10 %)
  • Followers 100
  • Following 88
  • Registered over 6 years ago
  • Most used languages
    Verilog     54.5 %
    SCSS     9.1 %
    CMake     9.1 %
    HTML
         9.1 %
    Python
         9.1 %
    C++
         9.1 %
  • Location 🇮🇳 India
  • Country Total Rank 9,735
  • Country Ranking
    Verilog     18
    CMake     155
    SCSS     300
    C++
         3,741

Top repositories

1

riscv-core

A customized RISCV core made using verilog
Verilog
17
star
2

vga-interface-with-TANG-PRIMER-FPGA

Interfacing Tang primer with VGA display.
Verilog
8
star
3

8-bit-computer

8 bit computer using sap logic
Python
6
star
4

Seven-Segment-with-Tang-Primer-FPGA

Seven Segment Interface with Tang Primer
Verilog
4
star
5

Carry-Lookahead-Adder-Cocotb

Verification test of Carry Lookahead Adder using cocotb
Verilog
4
star
6

Zener

ECP5 based FPGA Board
4
star
7

Aqua_Farm_Monitor

ESP32 Based IOT system to monitor Aqua Farming
C++
4
star
8

SRA-BOARD-2020

SRA development board is a esp32 based board with components on board like motor driver, switches and leds.
4
star
9

Omni-wheel-bot-in-coppeliasim

3
star
10

GSoC-2021

Log for GSoC 2021: https://ombhilare999.github.io/GSoC-2021/
SCSS
3
star
11

Microchip-Discovery-kit

Examples for the microchip discovery kit
HTML
2
star
12

icebreaker-ecp5-examples

Examples for icebreaker ++ board
Verilog
1
star
13

WRO_Arena-in-Coppeliasim

1
star
14

Object-Avoider-using-ROS-and-Gazebo

Object Avoider using ROS and Gazebo
CMake
1
star
15

Interconnect-from-scratch-in-chisel

Communication Between two FSMs in chisel
Verilog
1
star