Nikos Alexo (@nalexopo)
github

nalexopo

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  • Stars
    star
    11
  • Global Rank 920,445 (Top 32 %)
  • Followers 1
  • Following 1
  • Registered almost 8 years ago
  • Most used languages
    Verilog     85.7 %
    C
         14.3 %
  • Location 🇬🇷 Greece
  • Country Total Rank 1,842
  • Country Ranking
    Verilog     2
    C
         302

Top repositories

1

UDPaudiospy

An esp32 WiFi UDP stream Microphone and a python backend for spying a room straight to your computer speakers.
C
3
star
2

Ripple-Carry-timer

Ripple Carry timer counts up to 1 hour, I make use of the 4-BCD-to-4-digit-7-seg-led-driver. Tested on Xilinx Spartan 6 Mojo V3 dev Board.
Verilog
2
star
3

A-pulse-counter-with-modes

A pulse counter with modes (decrement,increment,increment by 2) implemented as a finite state machine with datapath. Tested in Spartan 6 Xilinx FPGA on a Mojo dev board.
Verilog
2
star
4

16-bit-to-4-digit-7-seg-led-driver

This is the same as 4-BCD-to-4-digit-7-seg-led-driver but with a 16bit input and an implementation of the double dabble algorithm that converts binary to BCD.
Verilog
1
star
5

5bit-base-3bit-exponent-to-16-bit-ouput

5bit base 3 bit exponent inputs to 16 bit output. WARNING!!! output is overflowing for large values but works well with rest, reason for this is that I have only implemented a 16bit led display. Tested on Xilinx Spartan 6 Mojo dev board
Verilog
1
star
6

LCD-16x2-Controller

A simple LCD 16x2 Controller with UART interface.
Verilog
1
star
7

4-BCD-to-4-digit-7-seg-led-driver

Title is self explenatory. just a driver for 4 BCD digits to a 4-digit-7-segment display. Tested on Spartan 6 Xilinx Mojo Development Board.
Verilog
1
star