Iztok Jeras (@jeras)
github

jeras

Twitter logo Share LinkedIn logo Share Facebook logo Share
  • Stars
    star
    113
  • Global Rank 190,295 (Top 7 %)
  • Followers 29
  • Registered almost 16 years ago
  • Most used languages
    Verilog     33.3 %
    SystemVerilog     28.6 %
    C
         19.0 %
    Shell
         9.5 %
    Python
         4.8 %
    C++
         4.8 %
  • Location 🇸🇮 Slovenia
  • Country Total Rank 148
  • Country Ranking
    SystemVerilog     1
    Verilog     3
    C
         26
    Shell
         50
    C++
         60
    Python
         359

Top repositories

1

sockit_owm

SocKit 1-wire (onewire) master
C
18
star
2

fpga-hdl

A set of small Verilog projects, to simulate and implement on FPGA development boards
Verilog
12
star
3

SystemC-UVM

UVM-SystemC Library
C++
8
star
4

rp32

RISC-V processor with CPI=1 (every single instruction executed in a single clock cycle).
SystemVerilog
8
star
5

soc-kit

System on Chip toolkit (Verilog 2001)
Verilog
7
star
6

rp8

RISC processor 8bit (AVR ISA), RTL based on 'navre'
SystemVerilog
7
star
7

sockit_cdc

clock domain crossing FIFO
Verilog
6
star
8

sockit_spi

SocKit SPI (3-wire, dual, quad) master
Verilog
5
star
9

riscv_asm_sv

RISC-V assembler/dis-assembler written in SystemVerilog
SystemVerilog
4
star
10

vivado_simulator

Evaluation of the Xilinx Vivado simulator
SystemVerilog
4
star
11

SystemC-Verification

SystemC Verification Library (SCV)
C
3
star
12

verilog_coding_style

Verilog coding style examples
Verilog
3
star
13

ADAMS

all digital PLL
SystemVerilog
3
star
14

preimages-2D

2D cellular automata preimages count&list algorithm
C
3
star
15

SystemVerilog-tests

Tests for a set of SystemVerilog features over a set of simulation and synthesis tools.
Shell
3
star
16

Terasic_DE1

Demo designs for the Terasic DE1 board
Verilog
2
star
17

TCB

Tightly Coupled Bus, low complexity, high performance system bus.
SystemVerilog
1
star
18

sigrok-dump

Example sigrok dumps
Python
1
star
19

ecs8

projects related to the ECS8 board
Verilog
1
star
20

sockit_i2c

I2C master/slave RTL and bench model code
Shell
1
star
21

office

LibreOffice templates
1
star
22

sigrok

sigrok
C
1
star