Guy Hutchison (@hutch31)
github

hutch31

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  • Stars
    star
    69
  • Global Rank 271,735 (Top 10 %)
  • Followers 22
  • Following 2
  • Registered almost 14 years ago
  • Most used languages
    Verilog     33.3 %
    Scala
         33.3 %
    C
         11.1 %
    Python
         11.1 %
    Java
         11.1 %
  • Location πŸ‡¬πŸ‡§ United Kingdom
  • Country Total Rank 13,912
  • Country Ranking
    Verilog     11
    Scala
         514
    C
         1,925
    Java
         8,562

Top repositories

1

tv80

TV80 Z80-compatible microprocessor
Verilog
39
star
2

sdlib

srdy-drdy library
Verilog
9
star
3

vpi_pcap_dump

Dump packets from Verilog to a pcap file using VPI calls from simulator
C
7
star
4

Balsa-AES-Core

Asynchronous AES core written using the Balsa hardware description language
Verilog
7
star
5

dclib

Decoupled library, a group of useful components implementing the DecoupledIO interface from Chisel3
Scala
2
star
6

chisel-exercises

Self-paced exercises for learning Chisel code
Scala
1
star
7

chisel-packetlib

Scala
1
star
8

teamgantt-proj-import

TeamGantt Project Importer
Python
1
star
9

MACsec-Test-Vectors

1
star
10

ChiselCodeGenerator

Template for a Chisel-based code generator with a Java front end
Java
1
star