HackAssembler

Repository for my C++-programmed Hack Machine Language Assembler

TestPattern

A plaid-pattern for testing the Video Sync Generator written in Verilog. Made using the book "Designing Video Game Hardware in Verilog"

BinaryCounter

A simple binary counter. Adds 1 every clock cycle, counting up to 15. Made using the book "Designing Video Game Hardware in Verilog"

ClockDivider

Simple clock divider in Verilog. It divides the signal of the clock (i.e. decreases the signal) by 2, 4, 8, and 16 times. Made using the book "Designing Video Game Hardware in Verilog"

VideoSyncGenerator

Verilog module that generates the required horizontal and vertical sync signals for a simulated CRT. Made using the book "Designing Video Game Hardware in Verilog"