Bhavya Vasudeva (@estija)
github

estija

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  • Stars
    star
    112
  • Global Rank 191,519 (Top 7 %)
  • Followers 16
  • Following 4
  • Registered over 7 years ago
  • Most used languages
    Verilog     33.3 %
    Arduino     22.2 %
    Python
         22.2 %
    MATLAB
         11.1 %
    Coq     11.1 %

Top repositories

1

LIME

Implementation of the paper, "LIME: Low-Light Image Enhancement via Illumination Map Estimation"
MATLAB
88
star
2

Co-VeGAN

Co-VeGAN: Complex-Valued Generative Adversarial Network for Compressive Sensing MR Image Reconstruction
Python
13
star
3

RISC

Verilog implementation of the 32-bit RISC processor.
Verilog
3
star
4

Maze-solving-line-follower

Programmed a line following bot to find the shortest path through a maze.
Arduino
2
star
5

Verilog-assignments

This repository contains some Verilog files in which DLD concepts like adders, multiplexer, multiplier, flip-flops, encoder etc. have been implemented.
Verilog
2
star
6

Four-Way-Traffic-Control-System

Verilog
1
star
7

32-bit-ALU

A 32-bit ALU with carry look ahead adder and ripple carry adder and provision for signed and unsigned numbers.
Coq
1
star
8

CMID

Code for the Conditional Mutual Information-Debiasing (CMID) method.
Python
1
star
9

LED-matrix

A project with arduino and shift registers which displays letters(moving and static) in the form of an 8x5 LED matrix.
Arduino
1
star