Steven Cheng (@eecheng87)
github

eecheng87

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  • Stars
    star
    63
  • Global Rank 290,063 (Top 10 %)
  • Followers 26
  • Following 10
  • Registered over 6 years ago
  • Most used languages
    C
         70.0 %
    VHDL     10.0 %
    Verilog     10.0 %
    JavaScript
         10.0 %
  • Location πŸ‡ΉπŸ‡Ό Taiwan
  • Country Total Rank 1,560
  • Country Ranking
    VHDL     24
    C
         81
    Verilog     143
    JavaScript
         1,950

Top repositories

1

ESCA

Effective System Call Aggregation
C
35
star
2

mode-switch-stat

Minimal tool for measuring cost of mode switch
C
14
star
3

SAIO

Scalable Asynchronous I/O motivated by io_uring
C
6
star
4

piano-tiles

game made by HTML, JS
JavaScript
3
star
5

fastio

Fully asynchronous I/O interface extended from SAIO
C
2
star
6

Memory_Manager

Implement three page replacement policies
C
1
star
7

Scheduling_Simulation

Implement scheduling through ucontext
C
1
star
8

MNIST_accelerator

Accelerating CNN in hardware aspect
VHDL
1
star
9

mFlexSC

To rewrok FlexSC in linux kernel
C
1
star
10

pipeline-riscv-cpu

use verilog to implement riscv pipeline cpu
Verilog
1
star