@develone
github

develone

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  • Stars
    star
    98
  • Global Rank 209,543 (Top 8 %)
  • Followers 14
  • Following 2
  • Registered about 11 years ago
  • Most used languages
    Verilog     33.3 %
    C
         20.8 %
    Python
         16.7 %
    Java
         4.2 %
    MATLAB
         4.2 %
    Prolog
         4.2 %
    Makefile     4.2 %
    C++
         4.2 %
    VHDL     4.2 %
    Shell
         4.2 %

Top repositories

1

Ultibo_Projects

C
4
star
2

jpeg-2000-test

testing of java 2000 code
Java
2
star
3

zynq-zedboard-logic

FPGA image for the Zedboard supporting HDMI, OLED, buttons and audio, based on ADI's reference design
2
star
4

pico-lifting

C
1
star
5

catzip

Verilog
1
star
6

uart_rxtx

Verilog
1
star
7

raspbian-pi-gen

Verilog
1
star
8

RPi_Scripts

Shell
1
star
9

verilog_myhdl_cosimulation_and_verilator

learning verilog simulation using myhdl cosimulation & verilator
Verilog
1
star
10

bin2hex_hex2bin

Python
1
star
11

fpga_development

Python
1
star
12

zedboard_yocto

zedboard build using yocto
VHDL
1
star
13

minos-samples

Tools and sample images for Minos hypervisor
Makefile
1
star
14

catboard_yosys

Verilog
1
star
15

learning_hdl

Python
1
star
16

zynq-zc702-logic

FPGA image for the zc702 supporting HDMI, based on ADI's reference design
1
star
17

rp2040-mqtt

mqtt test
C++
1
star
18

iverilog-examples

Verilog
1
star
19

raspberrypi2_gpio

C
1
star
20

shuttle

MATLAB
1
star
21

mpich

C
1
star
22

07118catzip

A ZipCPU demonstration port for the catboard based on icozip both Lattice HX8K FPGA
Verilog
1
star
23

raspberrypi2_yocto

Verilog
1
star
24

ZedSDR

A software defined radio approach for the Digilent Zedboard
Prolog
1
star
25

pico_w-remotes

Fom pico_examples a7ad1715 07/01//22
C
1
star
26

yocto-zeus-icestorm

Python
1
star