Discover @david-shmailov Open Source projects

David Shmailov (@david-shmailov)

david-shmailov

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Global Rank 1,106,139 (Top 39 %)
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Registered over 9 years ago
Most used languages

VHDL 40.0 %

C++
20.0 %

Java
20.0 %

Verilog 20.0 %
Location 🇮🇱 Israel
Country Total Rank 2,711
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Verilog 7

VHDL 7

C++
428

Java
693

Digital-Design-and-Logic-Synthesis_project

Digital Design and Logic Synthesis course final project

SPL_Assignment1

this is the first home assignment we received in "System Programming" course. This project was done by David Shmailov and Aviram Lachmani.

SPL-Assignment2

this is a home assignment we received in the "System Programming" course. This project was done by David Shmailov and Aviram Lachmani.

CPU_Task2_FPGA

Verification of RTL design via a Quartus FPGA chipset, Written by David Shmailov and Aviram Lachmani

RLC-Meter

As a final project in the "Introduction to Computers" course, we got an assignment to create a Resistance/Capacitance/Inductance meter based on the Texas Instruments MSP-430 microprocessor. This project was done by David Shmailov and Aviram Lachmani.

CPU_task3_MIPS

We implemented a single cycle version of the MIPS CPU in VHDL code, under the simplification of 1 cycle memory delay, a reduced instruction set defined by the assignment, and 10-bit memory space. We then used the Quartus FPGA chipset to verify the design. By David Shmailov and Aviram Lachmani