PAM_baseband_modulation

A baseband digital modulator, a Gaussian additive white noise channel and a baseband digital demodulator are simulated.

ASK_passband_Modulation

A baseband digital ASK modulator, a Gaussian additive white noise channel and a baseband digital demodulator are simulated.

Paths_Timing_Verification

A behavioral description of a 4-mode counter is implemented in Verilog. This description will serve as a detailed and formal specification of the operation of the designed device, then verilog timing directives are used to check its paths and times with and without delays.