Hidemi Ishihara (@aquaxis)
github

aquaxis

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  • Stars
    star
    261
  • Global Rank 99,703 (Top 4 %)
  • Followers 111
  • Following 2
  • Registered about 13 years ago
  • Most used languages
    Verilog     66.7 %
    C
         16.7 %
    JavaScript
         8.3 %
    Tcl     8.3 %
  • Location ๐Ÿ‡ฏ๐Ÿ‡ต Japan
  • Country Total Rank 2,533
  • Country Ranking
    Verilog     3
    Tcl     8
    C
         523
    JavaScript
         4,937

Top repositories

1

IPCORE

Verilog
119
star
2

gemac

Gigabit MAC + UDP/TCP/IP offload Engine
Verilog
30
star
3

aq_mipi_csi2rx_ultrascaleplus

Verilog
27
star
4

FPGAMAG18

FPGA Magazine No.18 - RISC-V
Verilog
17
star
5

synverll

C
14
star
6

FPGAMAG

FPGAใƒžใ‚ฌใ‚ธใƒณๅ‘ใ‘ Vivadoใƒ—ใƒญใ‚ธใ‚งใ‚ฏใƒˆ
C
7
star
7

CNNFPGA

C
5
star
8

ultra96v2_vivado

Ultra96V2 Vivado Project
Tcl
4
star
9

aq_axis_djpeg

Verilog
4
star
10

svDemo

Tcl
3
star
11

debug_tools

Debug Tools for FPGA
C
2
star
12

verilog2ipxact

2
star
13

biblio_doc

JavaScript
2
star
14

aq_hdmi_enc

1
star
15

l_chika

Verilog
1
star
16

aq_syncgen

1
star
17

aq_axi_getfreq

Verilog
1
star
18

aq_axi_sdma64

Verilog
1
star
19

riscv_debug

Verilog
1
star
20

TE0802-02

Xilinx UltraScale+ MPSoC Board(Trenz TE0802-02)
1
star
21

opencv_sample

1
star
22

mdbook

Book from markdown
JavaScript
1
star
23

aq_mipi_csi2rx_7series

1
star
24

ultra96_dp

Verilog
1
star
25

aq_intreg

1
star
26

aq_axils_sample

Verilog
1
star
27

aq_axis_t32f64

Verilog
1
star
28

aq_axi_sigcap

Verilog
1
star
29

aq_fifo

Verilog
1
star
30

aq_axis_reduce

Verilog
1
star
31

debug_uart

Verilog
1
star
32

aq_axis_disp

1
star
33

aq_axis_t64f32

1
star