@aabotaleb
github

aabotaleb

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  • Stars
    star
    11
  • Global Rank 897,564 (Top 32 %)
  • Followers 6
  • Following 1
  • Registered about 8 years ago
  • Most used languages
    VHDL     50.0 %
    SystemVerilog     25.0 %
    Verilog     25.0 %
  • Location 🇨🇦 Canada
  • Country Total Rank 20,385
  • Country Ranking
    VHDL     30
    SystemVerilog     35
    Verilog     55

Top repositories

1

CU-FPGA-Satellite-images-streaming-on-ZYNQ-XC7Z020

Verilog
5
star
2

FPGA-Piccolo-Ultra-weight-block-cipher-Encryption-On-ZYNQ-XC7Z020

VHDL
2
star
3

CU-Camera-Enhancement-Module

VLSI Project contains all phases of focus enhancement module + DMA + Cache memory starting from the VHDL code used for simulation inside the modelsim , synthsis using leonardo software to the floor planning , placement and routing - producing GDSII file using IC Station software then do DRC - LVS checking
VHDL
2
star
4

hello-world

1
star
5

SNAPE-FP

SNAPE-FP: SqueezeNet CNN with Accelerated Pooling Layers Extension based on IEEE-754 Floating Point Implementation through SW/HW Partitioning On ZYNQ SoC
SystemVerilog
1
star