Lorenzo Ruotolo (@Lelezinski)
github

Lelezinski

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  • Stars
    star
    5
  • Global Rank 1,431,031 (Top 50 %)
  • Followers 2
  • Following 6
  • Registered almost 4 years ago
  • Most used languages
    VHDL     50.0 %
    C
         50.0 %
  • Location 🇮🇹 Italy
  • Country Ranking
    VHDL     63
    C
         1,588

Top repositories

1

dlx

A complete 32-bit, five stages pipelined CPU that follows the MIPS ISA including a FWU and HDU.
VHDL
2
star
2

buffer-overflow-demo

Operating Systems for Embedded Systems A.Y. 2022/23 group project: a Privilege Escalation demonstration exploiting Buffer Overflow.
C
1
star