Discover @Gy-Hu Open Source projects

Guangyu (Gary) HU (@Gy-Hu)

Gy-Hu

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Registered about 6 years ago
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HW-Formal-Paper

Recent papers related to hardware formal verification.

E-Syn

E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)

AIG2INV

DeepIC3: Guiding IC3 Algorithms by Graph Neural Network Clause Prediction (ASP-DAC 2024)

pybmc

Implementation of bounded model checking with Z3py. (AIGER1.0 support)

EDA_FV_conference_deadline

Countdown for EDA and formal verification conference deadlines

DeepCheck

Unofficial Implementation of DeepCFI: A Non-intrusive Control-flow Integrity Checking based on Deep Learning

pyPDR

Implementation of IC3/PDR algorithm with z3py (AIGER 1.0 supported)

ML4PDR

NeuroPDR: Integrating Neural Networks in the PDR Algorithm for hardware model checking (MLCAD 2023)

IC3-Playground

Prototype some ideas related to IC3 algorithm. Also make a comparison environment for various implementation of IC3

ESP32-SmartGarden

Smart Garden Implemented by ESP32

Expr2Netlist

Simple parser and synthesizer to play with logic expression.

PDRC

Reproduce of "HVC2017: A Supervisory Control Algorithm Based on Property-Directed Reachability"