xie-1399/CS-Arch

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Created about 2 years ago
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xie-1399/CS-Arch

xie-1399

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The Fantastic RISCV Zone

B-Lib

some useful libs using in the SpinalHDL

Attention-Based-Accelerator

Implement some hardware NN accelerators using spinalHDL

Nvdla_Spinal

using the SpinalHDL to rebuild the NVDLA Arch

Brief-Chip

The Brief Chip is a Simple Soc project written in Spinal HDL , include a 3 stages RISCV CPU and a CNN Accelerator with RS Dataflow as Peripheral

MLArch

ML Systems And Computer Arch

Awesome-Paper

The trace of Paper Reading about DSA、GPU、LLM and AI System

HardWareHDL

Hardware HDL language about Spinal HDL and Chisel

Betsy

The Implement of the Systolic Array Accelerator

StylePatch

the source code of the StylePatch（a adversarial patch attack method using the local style fusion）

B-Core

a five stage riscv core using SpinalHDL and some common libs

Race

比赛项目代码

GPGPU

The trace to study in the GPU Arch and Cuda Programming

RVGenerator

use to generate the random RISC-V instructions to test the CPU

JavaSE

上传JavaSE项目

AndroidCode

用于上传有关Android的代码

ICTools

Here is some really useful tools for the ASIC/FPGA Design

Multimodal-VLP

The Implement of MultiModal VLP Transformers Alg