sylefeb/Silixel sylefeb/Silixel

  • Stars
    star
    40
  • Rank 677,259 (Top 14 %)
  • Language Verilog
  • License
    BSD 3-Clause "New...
  • Created over 2 years ago
  • Updated over 1 year ago
Twitter logo Share LinkedIn logo Share Facebook logo Share
sylefeb/Silixel
github

sylefeb

Reviews

There are no reviews yet. Be the first to send feedback to the community and the maintainers!

Repository Details

Exploring gate level simulation

More Repositories

1

Silice

Silice is an open source language that simplifies prototyping and writing algorithms on FPGA architectures.
C++
1,121
star
2

VoxModSynth

A simple, efficient, easily hackable C++ implementation of 3d model synthesis / wave function collapse
C++
188
star
3

VoxSurf

A simple, easily hackable C++ surface voxelizer (STL=>voxels)
C++
152
star
4

raster2mesh

GLSL
136
star
5

tinygpus

TinyGPUs, making graphics hardware for 1990s games
Lua
51
star
6

LibSL

My infamous LibSL library
C
27
star
7

mch2022-silice

Silice designs for the MCH2022 badge
Verilog
4
star
8

fpga-binutils

Compilation framework for FPGA tools
Shell
4
star
9

topopt99

A simple, easily hackable topopt code in C/C++
C++
2
star
10

cuda_knearests

Prototype of knearest search for points uniformly randomly distributed in space, in CUDA. Mostly toying with the idea for now.
Cuda
2
star
11

Verilog-Playground

Verilog Experiment Area
Coq
1
star
12

LibSL-small

A tiny subset of LibSL for use in stand-alone, no-dependency projects
C++
1
star
13

timex-data-link-deadline

Deadline app for the Timex Data Link
Assembly
1
star