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    86
  • Rank 382,193 (Top 8 %)
  • Language
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  • License
    GNU General Publi...
  • Created almost 4 years ago
  • Updated 8 months ago

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Repository Details

๐Ÿ“ฆ Prebuilt RISC-V GCC toolchains for x64 Linux.

More Repositories

1

neorv32

๐Ÿ–ฅ๏ธ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
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2

neo430

๐Ÿ’ป A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.
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3

neoTRNG

๐ŸŽฒ A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).
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4

fpga_puf

๐Ÿ”‘ Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.
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124
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5

captouch

๐Ÿ‘‡ Add capacitive touch buttons to any FPGA!
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99
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6

neorv32-verilog

โ™ป๏ธ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.
Verilog
56
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7

fpga_torture

๐Ÿ”ฅ Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.
VHDL
28
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8

neorv32-riscof

โœ”๏ธPort of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
Python
25
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9

cjtag_bridge

๐Ÿ”Œ Compact JTAG ("cJTAG") to 4-wire JTAG (IEEE 1149.1) bridge.
VHDL
22
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10

riscv-debug-dtm

๐Ÿ› JTAG debug transport module (DTM) - compatible to the RISC-V debug specification.
VHDL
21
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11

wb_spi_bridge

๐ŸŒ‰ A transparent Wishbone-to-SPI bridge supporting Execute-In-Place (XIP).
VHDL
21
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12

neorv32-formal

Formal verification (experiments) targeting the NEORV32 RISC-V processor.
VHDL
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13

msp430-gcc

Pre-compiled msp430-gcc compiler toolchains for 32/64-bit Windows and Linux machines.
5
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14

74xx_discrete_clock

A retro-style digital clock based on 74xx discrete logic chips
5
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15

neorv32-freertos

๐Ÿ’พ FreeRTOS port for the NEORV32 RISC-V Processor.
4
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16

neorv32-verif

โœ”๏ธ Check the NEORV32 Processor for RISC-V compatibility.
C
3
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17

neorv32-setups

Example setups for the NEORV32 RISC-V Processor
VHDL
2
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18

icarus-verilog-prebuilt

๐Ÿ“ฆ Prebuilt Icarus Verilog simulator package for x64 Linux.
1
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