stiggy87/ZynqBTC

This repository has been archived on 10/Aug/2023
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Rank 338,636 (Top 7 %)
Language VHDL
Created over 11 years ago
Updated about 1 year ago

stiggy87/ZynqBTC

stiggy87

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A Bitcoin miner for the Zynq chip utilizing the Zedboard.

source_to_inst

This is a TCL script that will take in Verilog and VHDL files and generate an instantiation template appropriately for the user to use in their design.

Project_Kirov

Autonomous Blimp/Zeppelin for Sparkfun AVC

adept_tcl

TCL package written to handle the some of the file export capabilities found in Jim Wu's ADEPT software (https://sites.google.com/site/adepthome/home).

pfSenseZ

pfSense ported to the Zedboard (can be adapted to work on any Zynq chip)