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rapid61850
Rapid-prototyping protection and control schemes with IEC 61850discover
A real-time monitoring and analysis tool for IEC 61850-9-2 LE Sampled Valuestunnel61850
IEC 61850 GOOSE and Sampled Value tunnelling using UDPpowerflow
Interactive visualisation of the steady-state current and power flow between two voltage terminals (with arbitrary magnitude and phase), connected by a series impedance. Implemented in Processing.js.dq0
Visualisation of dq0 transformpmu-latency-measure
Real-time measurement of Phasor Measurement Unit (PMU) reporting latencyieee738matlab
IEEE 738 MATLAB implementationrtds_sfcl
Resistive superconducting fault current limiter (SFCL) model in RSCAD for a Real-Time Digital Simulator (RTDS)commuter-bliss-uk
A Pebble watchface for UK rail commuterspq
Visualisation of voltage harmonicsSFCLdesign
Tool to plot the current-time characteristics of a resistive superconducting fault current limiter (SFCL)ieeepdf
Chrome extension to remove frame/banner above IEEEXplore PDF filesc2c_pq_analysis
simulink_sfcl
Resistive superconducting fault current limiter (SFCL) model for Simulink and SimPowerSystemspqube_data_extraction
comedy-connections
A visualisation of the interconnections between comedy actors and shows/filmssv_compress_timing
Real-Time SV Compression Timing Measurementpq_monitoring_visualisation
fibonaccifractal
3D Fibonacci fractal visualisation in ProcessingLove Open Source and this site? Check out how you can help us