Micro 8088

IBM XT Compatible Processor Board based on Faraday FE2010/FE2010A chipset

Introduction

Micro 8088 is an easy to build IBM PC/XT compatible processor board. It uses a fairly common Faraday FE2010/FE2010A chipset, that implements most of IBM PC/XT LSIs (Intel 8xxx ICs) and glue logic. Micro 8088 uses SRAM ICs to implement the system RAM, and a Flash ROM IC to store the BIOS, further reducing the number of components, and simplifying the build process.

Specifications

• Processor: Intel 8088 or compatible, NEC V20
  • Supports IBM PC/XT standard 4.77 MHz CPU frequency and, when using FE2010A chipset, 7.16 MHz and 9.54 MHz CPU frequencies
• Coprocessor: Intel 8087
• Faraday FE2010/FE2010A chipset, implementing the following components:
  • One 8237 direct memory access controller (DMAC)
  • One 8259 programmable interrupt controller (PIC)
  • One 8254 programmable interval timer (PIT)
  • One 8255 programmable peripheral interface (PPI)
  • Clock generation, and glue logic
• RAM: 512 KiB or 640 KiB base memory; Up to 192 KiB UMBs. Implemented using SRAM
• ROM: 64 KiB. Implemented using 128 KiB Flash ROM
• 8-bit ISA interface
• PS/2 compatible keyboard connector; built in AT2XT converter

Hardware Documentation

Schematic and PCB Layout

Schematic - Version 1.1

PCB Layout - Version 1.1

PCB Layout - Version 1.2

PCB Layout - Version 1.3

Building Insturctions

Please refer to Building Instructions page for detailed instructions.

Faraday FE2010/FE2010A Information

Please refer to Faraday FE2010A documentation and Faraday FE2010 datasheet for detailed information about Faraday FE2010/FE2010A chipsets.

Note: CPU clock frequency switching (turbo mode) is only implemented in Faraday FE2010A chipset (not in FE2010).

Jumpers, Connectors, and Switches

P1 - PS/2 Keyboard

P2 - Speaker

Note: To enable internal speaker connect a jumper across pins 1-2

P3 - Reset Switch

JP1 - Select Flash ROM area mapped to 0xF0000-0xFFFFF

JP2 - Select X1 Crystal Frequency

Note: 14.31818 MHz crystal supports 4.77 MHz and 7.16 MHz CPU clock frequencies; 28.63636 MHz crystal additionally supports 9.55 MHz CPU clock frequency

JP3 - RAM Chip Select Source

Note: FE2010A only generates RAM chip select for the base RAM (lower 640 KiB). It does not generate RAM chip select for UMBs, and therefore SPLD (U16) is required to implement UMBs

JP4 - Flash ROM Chip Select Source

Note: FE2010A does not generate chip select for memory write cycles, therefore it does not support in-system BIOS upgrades

SW1 - Reset Switch

Press SW1 to reset the system

SW2 - System Configuration

SW3 - UMB Configuration

Note: SPLD (U16) is required to implement UMBs. This switch is not used in systems without SPLD

Bill of Materials - Versions 1.1, 1.2, and 1.3

Micro 8088 project on Mouser.com - View and order all components except of the Faraday FE2010A chipset, and the PCB. Micro 8088 project on OSH Park - View and order the PCB.

Firmware Documentation

System BIOS

Micro 8088 uses a modified version of Xi 8088 BIOS. The BIOS binary images are provided in BIOS directory. The BIOS source code is available in 8088_bios GitHub repository

Turbo Mode Switching

The BIOS keyboard handler uses the following key combinations to switch the CPU clock frequency:

• Ctrl-Alt-Keypad - - Normal 4.77 MHz CPU clock frequency
• Ctrl-Alt-Keypad * - Turbo 7.16 MHz CPU clock frequency
• Ctrl-Alt-Keypad + - Turbo 9.55 MHz CPU clock frequency (works only on systems with 28.63636 MHz X1 crystal)

Note that the BIOS does not, and possibly can not check if the installed CPU and the FPU are actually capable of running at higher clock frequencies. Turning on the turbo mode in a system with 5 MHz CPU can make it unstable.

AT2XT Firmware

Micro 8088 integrates an AT2XT keyboard converter, implemented using PIC12F629 (U15). The firmware for this microcontroller is availabe from Vintage Computer Federation AT2XT page. The HEX file with the firmware can be extracted from XTATKEY_094.zip.

SPLD Fuse Maps

An optional ATF16V8/GAL16V8 SPLD (U16) allows using spare SRAM space for UMBs, and implements Flash ROM write access. The fuse maps for the SPLD are provided in SPLD directory of this repository. The SPLD/micro_8088_prod.jed fuse map should be used for production applications.

Changes

• Version 1.3
  • Update silkscreen:
    • SW2.3 - fix the description for the ON position
    • Add a warning about installing either U14 or U16, but not both
    • Update board version to 1.3
• Version 1.2
  • Update silkscreen:
    • JP2 - change the default to Closed
    • Bracket - move rectangles to the back side, add circles around mounting holes on the front side
    • Remove the line around ISA connector
    • Use KiCad OSHW logo
    • Update copyright years to 2017-2018
    • Update board version to 1.2
• Version 1.1
  • Recommend using 74F-series, and update the schematic and the silkscreen accordingly. 74F-series ICs are faster and slightly cheaper than 74ALS-series
  • Add 74F573 latch for latching A8-A11 signals. This fixes the DMA issue
  • Use 74F244 to buffer OSC and CLK signals
  • Use AS6C4008 for the second SRAM (U6) instead of AS6C1004. This resolves the AS6C1004 TTL compatibility issue
  • Use 74F00 for generating chip select signal for the second SRAM (U6), and for inverting the speaker signal
  • Add an optional SPLD (U16) to implement UMBs
  • Use 128 KiB Flash ROM instead of 32 KiB EEPROM. It is cheaper, and has twice more storage space
  • Use buffered /MEMR and /MEMW signals for SRAM and BIOS ROM
  • PCB dimensions changed from 5" x 4.3" to 6" x 4"
• Version 1.0
  • Initial version

Known Issues

• Version 1.2
  • SW2.3 description on the back silkscreen incorrectly references SW1.3 for the ON position
• Version 1.1
  • JP2 description on the back silkscreen suggests that the default JP2 position is Open. Since the recommended chipset is FE2010A and the recommended crystal frequency is 28.63636 MHz, the default JP2 position should be Closed
  • Update the silkscreen near ISA bracket mounting holes: The rectangles should be moved to the back silkscreen, and screw head sized circles should be shown on the front skilscreen
• Version 1.0
  • AS6C1008 (U6) does not have TTL compatible inputs causing instability with 640 KiB memory configruation
    • Workaround: use CMOS transceiver U11, e.g. 74AHCT245
  • DMA doesn't work properly.
    • This is due to A8-A11 address lines not being latched.
    • Workaround: add a 74F573 latch, and connect AA8-AA11 and A8-AA11 through it