• Stars
    star
    17
  • Rank 1,257,181 (Top 25 %)
  • Language Verilog
  • License
    Other
  • Created over 10 years ago
  • Updated about 4 years ago

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Repository Details

Modular Exponentiation core written i Verilog. Supports key lengths between 32 and 8192 bits.

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keywrap

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